PWM Controller Tri-State Voltage Generation Circuit
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Solution Overview
Problem
Conventional power supply circuits experience poor switching performance due to the resistance-capacitance effect from parasitic capacitors and external resistors, causing a prolonged time for the PWM signal to reach a tri-state voltage level during zero current states, leading to increased switching energy loss.
Innovation Solution
A PWM controller with a tri-state voltage generation method that employs a voltage-dividing unit and control unit to rapidly pull the PWM signal to a tri-state voltage level using a resistor voltage-dividing method and maintains it through a buffer, allowing the PWM signal to enter the tri-state mode more quickly.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the PWM signal uses a conventional buffer output, then the circuit structure is simple, but the resistance-capacitance effect from parasitic capacitors and external resistors causes a prolonged time (e.g., 180 ns) to reach the tri-state voltage level, resulting in poor switching performance
Solution Approach 1:
The patent divides the voltage generation into two separate circuits: a temporary voltage generation circuit and a tri-state voltage generation circuit. The temporary voltage circuit uses a voltage-dividing unit with resistors to quickly establish an intermediate voltage level, while the tri-state voltage circuit maintains the final tri-state level. This segmentation allows each circuit to be optimized for its specific function, achieving fast switching without excessive complexity.
Solution Approach 2:
The temporary voltage generation circuit performs preliminary action by quickly establishing an intermediate voltage level before the tri-state voltage generation circuit takes over. This preliminary voltage establishment reduces the time required to reach the final tri-state level, effectively preparing the output pin for the subsequent voltage transition and minimizing the overall switching time.
2Loss of energy
If the PWM signal transitions through tri-state during zero current state, then switching energy loss is reduced, but the prolonged transition time increases the duration of harmful currents affecting the driving circuit
Solution Approach 1:
The patent applies the skipping principle by using the temporary voltage generation circuit to rapidly pull the output voltage to an intermediate level, effectively rushing through the critical transition phase. This reduces the time spent in the high-current state, minimizing the duration of harmful currents while still achieving the energy-saving tri-state operation during zero current conditions.
Solution Approach 2:
The temporary voltage generation circuit acts as an intermediary between the conventional buffer output and the final tri-state voltage. This intermediate voltage stage provides a transition pathway that reduces both the energy loss and the time duration of harmful currents, mediating between the conflicting requirements of energy efficiency and fast switching.
3Ease of manufacture
If the output pin relies on parasitic capacitor and external resistor to set tri-state voltage level, then the circuit design is simplified, but the resistance-capacitance effect causes poor switching performance and extended transition time
Solution Approach 1:
The patent segments the voltage generation function into two distinct circuits with specific roles. The temporary voltage generation circuit handles the rapid transition phase using a voltage-dividing unit, while the tri-state voltage generation circuit maintains the stable tri-state level. This segmentation improves switching performance by assigning specific optimization goals to each circuit while maintaining reasonable design simplicity.
Solution Approach 2:
The voltage-dividing unit in the temporary voltage generation circuit uses readily available components (resistors) to automatically generate the intermediate voltage level without requiring complex control mechanisms. This self-service approach maintains ease of manufacture while significantly improving switching performance through the rapid voltage establishment.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly reduces the time for the PWM signal to enter the tri-state mode and minimizes the impact of large currents on the driving circuit, enhancing switching performance and reducing energy loss.
Implementation Method 1
uses a resistor voltage-dividing method to rapidly pull the voltage level of the PWM signal to a tri-state voltage level interval
Implementation Method 2
maintains the voltage level of the PWM signal in the tri-state voltage level interval through a buffer
Implementation Method 3
the resistance-capacitance effect generated by the parasitic capacitor CPS in the driving circuit 12 and the external setting resistor RSET
Implementation Method 4
the resistance-capacitance effect generated by the parasitic capacitor CPS in the driving circuit 12 and the external setting resistor RSET
Data Source
AI summary
A pulse-width modulation (PWM) controller including an output pin, a temporary voltage generation circuit and a tri-state voltage generation circuit is disclosed. The temporary voltage generation circuit includes a voltage-dividing unit and a control unit. The voltage-dividing unit is coupled to the output pin and the control unit respectively. The control unit receives an enable signal and a PWM signal. The tri-state voltage generation circuit is coupled to the temporary voltage generation circuit and the output pin and receives the enable signal, the PWM signal and a tri-state input voltage. When the PWM controller is operated in a tri-state mode, the control unit controls the voltage-dividing unit to provide a temporary voltage to the output pin according to the enable signal and PWM signal, and then the tri-state voltage generation circuit provides a tri-state voltage to the output pin according to the enable signal and PWM signal.