Multi-Dielectric Structure for Embedded Trace Substrate Warpage Control
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Solution Overview
Problem
Current two-layer embedded trace substrates face limitations in patterning technology due to maximum copper thickness, leading to via dimpling and warpage issues, which affect the reliability of electrical connections and increase production costs.
Innovation Solution
The use of a multi-dielectric structure with two dielectric layers of different materials, where the second dielectric layer is stiffer than the first, allows for smaller via sizes and reduced dielectric thickness, addressing via dimpling and warpage concerns while extending design rules to 6/8 line width/space.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If maximum copper thickness is used in two-layer embedded trace substrates, then electrical conductivity is improved, but via dimpling occurs leading to connection reliability degradation
Solution Approach 1:
The substrate is divided into multiple dielectric layers (first dielectric layer, second dielectric layer, third dielectric layer) with different material compositions and mechanical properties. This segmentation allows each layer to contribute differently to via support, with stiffer intermediate layers preventing dimpling while maintaining overall conductivity.
Solution Approach 2:
The patent employs composite dielectric structures combining materials with different stiffness characteristics. The second dielectric layer positioned between copper traces has higher stiffness than adjacent layers, creating a composite structure that mechanically supports vias and prevents dimpling during fabrication and operation.
2Manufacturing precision
If dielectric thickness is increased to support larger vias, then via dimpling is reduced, but substrate warpage increases
Solution Approach 1:
Different dielectric layers are assigned different local mechanical properties (stiffness, thickness) optimized for their specific functions. The second dielectric layer has higher stiffness locally at via regions to prevent dimpling, while the overall layered structure maintains global flatness to prevent warpage.
Solution Approach 2:
The patent changes material parameters (dielectric constant, stiffness, thickness) across different layers to optimize performance. By adjusting the stiffness and thickness parameters of individual dielectric layers, the structure achieves both via support and warpage control.
3Ease of manufacture
If copper thickness is reduced to extend patterning design rules, then manufacturing capability is improved, but electrical conductivity decreases
Solution Approach 1:
The patent replaces reliance on thick copper for mechanical via support with a mechanically optimized multi-dielectric structure. This substitution allows thinner copper traces (improving patterning capability) while the stiffer dielectric layers provide the necessary mechanical support to prevent via dimpling.
Data Source
AI summary
Certain aspects of the present disclosure generally relate to an embedded trace substrate having at least two different dielectric layers with different dielectric materials and methods for fabricating the same. One example embedded trace substrate generally includes a first metal layer; a first dielectric layer disposed below the first metal layer and comprising a first dielectric material; a second dielectric layer disposed below the first dielectric layer and comprising a second dielectric material, wherein the second dielectric material of the second dielectric layer is stiffer than the first dielectric material of the first dielectric layer; and a second metal layer disposed below the second dielectric layer.