Multi-Gate HEMT ESD Protection via Staged Carrier Depletion
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Solution Overview
Problem
High Electron Mobility Transistors (HEMTs) are vulnerable to damage from electrostatic discharge (ESD) events and over-voltages, requiring effective protection circuits that do not disrupt their switching operation.
Innovation Solution
A multi-gate HEMT structure with a wider-bandgap semiconductor layer forming a heterojunction, featuring multiple gates with distinct threshold voltages to manage carrier depletion and current flow, including a second gate electrically coupled to the drain to enhance ESD protection and reduce leakage current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a protection circuit is added to protect HEMT from ESD events, then reliability is improved, but device complexity increases
Solution Approach 1:
The patent combines the protection function with the main HEMT device by integrating a second gate directly into the HEMT structure. This second gate is coupled to the drain and works in conjunction with the first gate to provide ESD protection, eliminating the need for separate external protection circuits and thereby reducing device complexity while maintaining reliability improvement.
2Reliability
If multiple gates are used to provide ESD protection, then reliability is improved, but manufacturing precision requirements increase
Solution Approach 1:
The patent applies local quality by giving each gate distinct characteristics - the first gate has a first threshold voltage and the second gate has a second threshold voltage that is different from the first. This allows each gate to perform its specific function in the ESD protection mechanism, with the second gate activating at a different voltage level to provide staged protection, thereby achieving reliable ESD protection while managing manufacturing precision through differentiated local properties.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The multi-gate HEMT structure effectively clamps ESD currents and reduces power loss due to leakage, maintaining device operation integrity while withstanding negative potentials, with threshold voltages optimized for efficient switching and protection.
Implementation Method 1
Majority carriers in the 2DEG channel proximate the first gate are depleted by the first gate when a potential voltage less than a first threshold voltage is applied between the first gate and the source
Implementation Method 2
Majority carriers in the 2DEG channel proximate the second gate are depleted by the second gate when a potential voltage less than a second threshold voltage is applied between the second gate and a fifth portion of the wider-bandgap semiconductor layer
Implementation Method 3
a wider-bandgap semiconductor layer disposed on the wide-bandgap semiconductor layer to form a heterojunction, wherein a Two-Dimension Electron Gas (2DEG) channel occurs in the wide-bandgap semiconductor layer proximate a boundary with the wider-bandgap semiconductor layer
Data Source
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AI summary
A multi-gate High Electron Mobility Transistor (HEMT) can include a Two-Dimension Electron Gas (2DEG) channel between the drain and the source. A first gate can be disposed proximate the 2DEG channel between the drain and source. The first gate can be configured to deplete majority carriers in the 2DEG channel proximate the first gate when a potential applied between the first gate and the source is less than a threshold voltage associated with the first gate. A second gate can be disposed proximate the 2DEC channel, between the drain and the first gate. The second gate can be electrically coupled to the drain. The second gate can be configured to deplete majority carriers in the 2DEG channel proximate the second gate when a potential applied between the second gate and the 2DEG channel between the second gate and the first gate is less than a threshold voltage associated with the second gate. The threshold voltage associated with the second gate can be equal to or greater than the threshold voltage associated with the first gate.