Multi-Level Clock Data Recovery Circuit Amplitude Detection

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Solution Overview

Problem

Existing clock and data recovery (CDR) circuits face challenges in accurately detecting amplitude levels of data signals due to noise, phase distortions, and non-linearity, leading to increased bit-error-rate (BER) and requiring auxiliary signals for amplitude level maintenance.

Innovation Solution

A CDR circuit comprising samplers, a clock recovery circuit, a level finding circuit, an offset voltage generator, and a data recovery circuit, which generates and controls reference offset voltage levels independently, allowing accurate amplitude level detection without auxiliary signals and reducing BER.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If conventional CDR circuits use comparators and decoding logic to detect amplitude levels, then data signal processing is achieved, but noise and phase distortions cause overlapping of amplitude levels leading to increased bit-error-rate

Engineering Contradiction:
Improveamplitude level detection accuracyVSAvoidbit-error-rate
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The patent divides the amplitude level detection into multiple discrete stages using five samplers (first through fifth samplers), each comparing the data signal against a specific reference offset voltage level. This segmentation allows independent optimization of each detection threshold, improving the ability to distinguish between adjacent amplitude levels even in the presence of noise and phase distortions, thereby reducing bit-error-rate while maintaining detection accuracy.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies different reference offset voltage levels to different samplers, creating localized detection thresholds optimized for specific amplitude level transitions. Each sampler uses a tailored reference voltage (first through fifth reference offset voltage levels) that is specifically suited for detecting particular amplitude boundaries, rather than using a uniform detection approach. This local quality enhancement improves detection precision for each amplitude level while maintaining overall system reliability.

Inventive Principle:
Principle #3Local quality

2Productivity

If multi-level data transmission systems use more than two amplitude levels to increase transmission capacity, then data transmission efficiency is improved, but accurate detection of multiple amplitude levels becomes more difficult due to noise and channel losses

Engineering Contradiction:
Improvetransmission capacityVSAvoidamplitude level detection difficulty
Core Design Contradiction:
ProductivityVSDifficulty of detecting and measuring

Solution Approach 1:

The patent segments the multi-level amplitude detection task into five distinct comparison operations, with each sampler dedicated to detecting specific amplitude level transitions. By dividing the complex multi-level detection into smaller, manageable comparison stages against sequentially arranged reference voltages, the system maintains high transmission capacity while simplifying the detection of each individual amplitude level, thereby reducing the overall difficulty of measurement.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent changes the detection parameters by using five different reference offset voltage levels that are sequentially arranged. This parameter variation allows the system to adapt to different amplitude level configurations in multi-level transmission systems, making detection easier by transforming the complex multi-level problem into a series of simpler binary comparison operations against optimized reference voltages.

Inventive Principle:
Principle #35Parameter changes

3Measurement precision

If conventional systems require auxiliary signals to maintain amplitude levels, then amplitude level accuracy can be maintained, but system complexity and the need for additional signals increases

Engineering Contradiction:
Improveamplitude level accuracyVSAvoidsystem complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent extracts the amplitude level reference information directly from the data signal itself by using the data signal to generate the five reference offset voltage levels through a voltage divider network. This eliminates the need for separate auxiliary reference signals, reducing system complexity while maintaining amplitude level accuracy. The reference voltages are derived internally from the incoming data signal, removing the dependency on external auxiliary signal sources.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent makes the data signal serve multiple functions: it is both the signal to be detected and the source for generating the reference offset voltage levels. The universal use of the data signal for both detection and reference generation eliminates the need for separate auxiliary signal paths, simplifying the overall system architecture while maintaining the precision needed for accurate multi-level amplitude detection.

Inventive Principle:
Principle #6Universality (Multi-functionality)

4Measurement precision

If reference offset voltage levels are not independently controlled, then circuit design is simpler, but accurate detection of all amplitude levels cannot be achieved due to noise and distortions

Engineering Contradiction:
Improveamplitude level detection accuracyVSAvoidreference voltage control complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent segments the reference voltage control into five independent control mechanisms, with each reference offset voltage level (first through fifth) being independently adjustable. This segmentation allows each reference voltage to be optimized separately for its specific detection task, improving overall detection accuracy while keeping each individual control mechanism relatively simple. The independent controllability enables fine-tuning of each threshold without affecting others, achieving high precision without requiring a monolithically complex control system.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS10659214B2Multi-level clock and data recovery circuit
Publication Date: 2020.05.19 SILAB TECH PVT LTD
  • US10659214B2 patent drawing
  • US10659214B2 patent drawing
  • US10659214B2 patent drawing

AI summary

A clock and data recovery (CDR) circuit includes first through ninth samplers, a clock recovery circuit, a level finding circuit, an offset voltage generator, and a data recovery circuit. Each of the first through ninth samplers samples a data signal based on one of first through ninth reference offset voltage levels to generate first through ninth intermediate signals, respectively. The clock recovery circuit generates the first through fourth clock signals based on the first, second, fifth, and eighth intermediate signals. The level finding circuit generates a band level signal by varying the third intermediate signal. The offset voltage generator generates one of: the fourth and seventh reference offset voltage levels, the fifth and eighth reference offset voltage levels, and the sixth and ninth reference offset voltage levels based on the band level signal. The data recovery circuit detects an output data signal based on the fourth through ninth intermediate signals.