Multi-Location Wafer Zapping for Grounding
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The existing zapping process for forming holes in the backside insulating layer of a wafer to facilitate grounding is destructive and causes damage, necessitating a method to reduce this damage while effectively creating breakdowns for grounding purposes.
Innovation Solution
A system and method utilizing multiple conductive interfaces and a pulse generation unit to generate zapping pulses for creating controlled breakdowns in the backside insulating layer, with a controller and sensor to monitor and adjust the zapping pulses to minimize damage and ensure effective breakdowns.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If high power voltage pulses are supplied to the backside insulating layer to cause breakdown and form holes for grounding, then the grounding effectiveness is improved, but the damage to the wafer increases
Solution Approach 1:
The zapping process is divided into multiple sequential stages with decreasing pulse intensities. The first stage uses high power pulses to initiate breakdown and form conductive paths for grounding. Subsequent stages use progressively lower power pulses to complete the holes while minimizing additional damage. This segmentation allows the system to achieve effective grounding while reducing cumulative wafer damage compared to using a single high-power pulse.
2Reliability
If multiple zapping pulses are applied to different locations of the backside insulating layer, then the grounding coverage is improved, but the complexity of the zapping system increases
Solution Approach 1:
Multiple conductive interfaces are merged into a single integrated zapping system that can simultaneously or sequentially contact multiple locations on the wafer backside. The system combines multiple contact points, pulse generation capabilities, and control functions into one unified apparatus, achieving improved grounding coverage without proportionally increasing overall system complexity.
Solution Approach 2:
The system applies zapping pulses in a periodic, controlled sequence to different locations on the backside insulating layer. Rather than continuous or random pulsing, the system systematically cycles through multiple contact points with regulated intervals, ensuring comprehensive grounding coverage while maintaining manageable operational complexity through structured periodic action.
3Manufacturing precision
If the intensity and duration of zapping pulses are increased to ensure complete breakdown, then the breakdown effectiveness is improved, but the damage to the wafer increases
Solution Approach 1:
The system dynamically changes pulse parameters (intensity, duration, frequency) across different zapping stages and locations. Rather than using fixed high-intensity pulses throughout, the system adjusts parameters to match the specific needs of each breakdown stage and location, ensuring complete insulation breakdown while minimizing excessive energy input that would cause additional wafer damage.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The system reduces damage to the wafer by controlling the intensity, duration, and interval of zapping pulses, allowing for precise breakdowns in multiple locations, thereby enabling effective grounding while minimizing harm to the wafer.
Implementation Method 1
The zapping pulses cause a breakdown of the backside insulating layer
Data Source
AI summary
A system for zapping a wafer, the system may include a pulse generation unit that is configured to generate (a) first zapping pulses for causing a breakdown in a first location of a backside insulating layer of a wafer, and (b) second zapping pulses for causing a breakdown in a second location of the backside insulating layer of the wafer; a first conductive interface that is configured to convey the first zapping pulses to the first location, while contacting the first location; a second conductive interface that is configured to convey the second zapping pulses to the second location, while contacting the second location; and wherein the first location differs from the second location.