Multi-Master SPI Bus Arbitration Interface

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Solution Overview

Problem

Conventional SPI communication systems are limited by the need for a single master device, which can impede communication when multiple devices require access to another device on the SPI bus, leading to potential collisions and race conditions.

Innovation Solution

A system and method that allows multiple master devices to operate on a SPI bus by using an arbitration interface with SPI hold and arbitration signals to toggle between high and low states, enabling each master device to identify bus availability and control the bus without collisions, with one master device controlling the bus for a specified duration before releasing it for the other to take over.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If a single master device is used in SPI communication, then the interface is well-defined and simple, but multiple devices cannot access the SPI bus simultaneously

Engineering Contradiction:
Improvenumber of master devicesVSAvoidarbitration mechanism
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent introduces an arbitration interface as an intermediary between multiple master devices and the SPI bus. This interface includes arbitration logic that mediates access requests from multiple masters, granting bus access to one master at a time while preventing simultaneous access. The arbitration interface acts as a mediator that resolves conflicts between multiple master devices without requiring changes to the underlying SPI protocol, thus maintaining compatibility while enabling multi-master operation.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Adaptability or versatility

If multiple master devices are allowed on the SPI bus, then communication flexibility improves, but collisions and race conditions may occur

Engineering Contradiction:
Improvemulti-master capabilityVSAvoidcommunication stability
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent implements preliminary action by requiring master devices to assert their intent to access the SPI bus before actual data transfer begins. The arbitration interface detects these preliminary access requests and grants permission in a controlled sequence, ensuring that only one master device is permitted to access the bus at any given time. This preliminary assertion and granting mechanism prevents collisions and race conditions by establishing a clear access hierarchy before communication occurs.

Inventive Principle:
Principle #10Preliminary action

3Productivity

If multiple master devices access the SPI bus simultaneously, then communication efficiency increases, but signal collisions occur

Engineering Contradiction:
Improvecommunication throughputVSAvoidsignal collision
Core Design Contradiction:
ProductivityVSObject-generated harmful factors

Solution Approach 1:

The patent employs periodic action through time-multiplexed bus access, where the SPI bus is allocated to different master devices in periodic time slots. The arbitration interface manages this periodic allocation by granting bus access to one master device at a time in a systematic sequence, ensuring that data signals from different masters do not collide. This periodic time-division approach maintains high communication throughput while preventing harmful signal collisions that would occur with truly simultaneous access.

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS12189556B2System and method for a serial peripheral interface
Publication Date: 2025.01.07 DENSO CORP
  • US12189556B2 patent drawing
  • US12189556B2 patent drawing
  • US12189556B2 patent drawing

AI summary

A system and method are provided to enable first and second devices coupled to a SPI bus to operate as master devices on the SPI bus without collisions between the two devices or race conditions with respect to obtaining control over the SPI bus.