Multi-module interposer wafer-level packaging substrate elimination
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Solution Overview
Problem
There is a persistent challenge in developing a multichip semiconductor package without a substrate that meets the demand for increased storage capacity in a smaller form factor, as existing efforts have proven difficult to achieve.
Innovation Solution
The use of multi-module interposers formed at the wafer level, which provide fan-out signal paths and allow for various packaging configurations such as wire bonded, flip chip, and through silicon via (TSV) packages, enabling communication between semiconductor dies and a host device without a substrate, by forming internal electrical connections and bond pads on the interposers and redistributing signals through a redistribution layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If a substrate is used in traditional SIP or MCM packaging, then structural support and electrical interconnection are provided, but the overall form factor and size of the semiconductor package increase
Solution Approach 1:
The patent extracts and removes the substrate from the traditional SIP/MCM packaging structure. Instead of using a separate substrate to mount and interconnect semiconductor dies, the invention integrates the interconnection function directly into the semiconductor wafer itself through through-wafer vias and conductive paths, eliminating the need for a substrate and thereby reducing the overall package size and volume.
Solution Approach 2:
The patent merges the functions of the substrate and the semiconductor dies into a single integrated structure. The wafer-level packaging approach combines multiple semiconductor dies and interconnection paths within the wafer itself, eliminating the need for a separate substrate. This merging of functions reduces the number of components and decreases the overall package volume while maintaining structural support and electrical interconnection capabilities.
2Quantity of substance
If multiple semiconductor dies are mounted on a substrate, then storage capacity is increased, but the package complexity and manufacturing difficulty increase
Solution Approach 1:
The patent applies preliminary action by performing all interconnection and packaging operations at the wafer level before dicing. Conductive paths, through-wafer vias, and die interconnections are established while the wafer remains intact, allowing for more efficient and less complex manufacturing. This preliminary consolidation of operations simplifies the overall manufacturing process compared to traditional post-dice assembly methods required for substrate-based MCM packaging.
Solution Approach 2:
The patent segments the manufacturing process into wafer-level operations followed by dicing. By completing all complex interconnection and packaging tasks at the wafer level, the subsequent dicing step simply separates pre-assembled units. This segmentation reduces manufacturing complexity compared to traditional approaches where multiple separate assembly operations are required after dicing to achieve the same multi-die configuration.
3Volume of moving object
If a substrate is used for signal transfer, then electrical connection between dies and host device is established, but the overall device size increases
Solution Approach 1:
The patent extracts the signal transfer function from the substrate and relocates it directly into the wafer structure. Through-wafer vias and internal conductive paths provide signal routing within the wafer itself, eliminating the need for external substrate-based signal paths. This extraction reduces device volume while maintaining reliable electrical connection between the semiconductor dies and the host device.
4Volume of moving object
If substrate-based packaging is used, then structural support is provided, but the form factor cannot be reduced further
Solution Approach 1:
The patent merges the structural support function with the semiconductor wafer itself. The wafer, through its integrated through-wafer via structure and internal conductive paths, provides both mechanical support and electrical interconnection simultaneously. This eliminates the need for a separate substrate that would increase form factor, while the integrated structure maintains adequate structural strength for the device.
Data Source
AI summary
A semiconductor device is disclosed including a multi-module interposer for enabling communication between one or more semiconductor dies within the device and a host device on which the semiconductor device is mounted. The multi-module interposer may be formed at the wafer level, and provides fan-out signal paths to and from the one or more dies in the device. Additionally, the multi-module interposer allows any of a variety of different semiconductor packaging configurations to be formed at the wafer level, including for example wire bonded packages, flip chip packages and through silicon via (TSV) packages.