Multi-Offset Branch Prediction to Reduce Re-Steering
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Solution Overview
Problem
Conventional branch prediction units (BPU) in processors face limitations in bandwidth due to re-steering events after every taken branch, which restricts the performance of superscalar processors, especially in wide and deep out-of-order execution cores.
Innovation Solution
The implementation of a Multi-Offset Predictor (MOP) that predicts multiple taken branches per cycle, allowing the processor to jump directly to the target of the last predicted branch, thereby reducing re-steering events and enhancing BPU bandwidth without requiring additional storage or complex mechanisms.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional branch prediction units perform re-steering after every taken branch, then branch prediction accuracy is maintained, but BPU bandwidth is restricted and processor performance deteriorates
Solution Approach 1:
The patent segments the branch prediction function into two independent predictors: a multi-offset predictor (MOP) that handles sequential branches and a traditional predictor that handles other branch types. This segmentation allows the MOP to predict multiple sequential branches without re-steering, thereby increasing BPU bandwidth while maintaining prediction accuracy through the complementary traditional predictor.
Solution Approach 2:
The multi-offset predictor implements continuous prediction of sequential branches by maintaining a buffer of offset values and predicting multiple branch targets without interrupting the prediction stream. This continuity eliminates re-steering events for sequential branches, sustaining useful prediction action across multiple branches and significantly improving BPU bandwidth.
2Productivity
If multiple branch predictions are made per cycle, then processor throughput increases, but hardware complexity and storage requirements increase
Solution Approach 1:
The multi-offset predictor uses a universal buffer structure that stores offset values applicable to multiple sequential branches. This single buffer serves multiple prediction purposes, enabling the predictor to generate multiple branch targets using the same hardware resources, thereby increasing throughput without proportionally increasing hardware complexity.
Solution Approach 2:
The patent uses a buffer to store offset values that are copied and applied to multiple branch instructions sequentially. Instead of creating complex prediction logic for each branch, the same offset buffer is copied and utilized across multiple prediction cycles, simplifying the hardware while enabling multiple predictions per cycle.
3Productivity
If traditional branch prediction is used, then implementation is simple, but bandwidth is limited and performance of wide and deep out-of-order cores is restricted
Solution Approach 1:
The multi-offset predictor performs preliminary prediction of multiple sequential branch targets in advance, storing them in a buffer before they are needed. This preliminary action allows the processor to fetch and decode multiple instructions ahead of time, reducing pipeline stall time and improving overall processor performance without complex real-time prediction logic.
Data Source
AI summary
Techniques and mechanisms for a processor to determine an execution of instructions based on a prediction of a taken branch. In an embodiment, a first prediction unit generates each of multiple branch predictions in one cycle of successive branch prediction cycles. An indication of the branch predictions is provided to an execution pipeline, which prepares to execute an instruction based on the indication. Where a first one of the branch predictions is determined to be of a low confidence type, said first branch prediction is further indicated to a second prediction unit, which performs a second branch prediction based on the same branch instruction for which the first branch prediction was made. In another embodiment, the second prediction unit signals that a state of the execution pipeline is to be cleared, based on a determination that the first and second branch predictions are inconsistent with each other.