Multi-Oscillator Circuit Topology for Low-Parasitic TDC Signals

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The connection of multiple oscillators' output nodes leads to increased parasitic capacitance and deteriorated symmetry and linearity of oscillation signals, which affects the accuracy of time signal generation and digitization.

Innovation Solution

The oscillation circuit design connects output nodes of different stages from multiple oscillators in a specific configuration, preventing concentrated parasitic capacitance and maintaining phase noise performance by sharing phase information through delay elements, and classifying oscillators into groups for even distribution of connections.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If multiple oscillators' output nodes are connected with each other to reduce phase noise, then phase noise performance is improved, but parasitic capacitance increases and symmetry deteriorates

Engineering Contradiction:
Improvephase noise performanceVSAvoidparasitic capacitance
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent segments the connection topology by connecting output nodes of different stages rather than all output nodes to a single common node. This distributes the parasitic capacitance across multiple connection points, preventing concentration at one location while still achieving phase noise reduction through inter-oscillator coupling.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from a one-dimensional common-node connection approach to a multi-dimensional connection topology where output nodes are connected across different stages. This dimensional change in the connection architecture allows phase noise reduction while avoiding the parasitic capacitance concentration problem of single-node connections.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If multiple oscillators' output nodes are connected with each other to reduce phase noise, then phase noise performance is improved, but symmetry of oscillation signal deteriorates

Engineering Contradiction:
Improvephase noise performanceVSAvoidsymmetry of oscillation signal
Core Design Contradiction:
ReliabilityVSStability of the object's composition

Solution Approach 1:

The patent intentionally employs asymmetric connection patterns where output nodes at different stages are connected in specific configurations rather than symmetrically. This controlled asymmetry in the connection topology reduces phase noise while managing the symmetry requirements of individual oscillation signals through stage-specific connections.

Inventive Principle:
Principle #4Asymmetry

3Reliability

If multiple oscillators' output nodes are connected with each other to reduce phase noise, then phase noise performance is improved, but linearity of oscillation signal deteriorates

Engineering Contradiction:
Improvephase noise performanceVSAvoidlinearity of oscillation signal
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent applies local quality by making the connection characteristics stage-dependent. Different stages have different connection patterns, allowing each local region (stage) to be optimized for its specific function while collectively achieving phase noise reduction without compromising overall linearity.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS11876519B2Oscillation circuit, time-to-digital converter, and electronic device
Publication Date: 2024.01.16 KK TOSHIBA
  • US11876519B2 patent drawing
  • US11876519B2 patent drawing
  • US11876519B2 patent drawing

AI summary

An oscillation circuit has a first oscillator having output nodes of n stages, where n is an integer of 3 or more, a second oscillator having output nodes of n stages, and a third oscillator having output nodes of n stages. An output node at an a-th stage of the first oscillator and an output node at an a-th stage of the second oscillator are connected with each other, where a is an integer of 1 or more and n or less and an output node at a b-th stage of the second oscillator and an output node at a b-th stage of the third oscillator are connected with each other, where b is an integer of 1 or more and n or less different from a.