Multi-pad Test Circuit Using Switching Networks to Reduce Probe Count
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Solution Overview
Problem
The increasing complexity and cost of testing apparatuses for integrated circuit chips due to the finer semiconductor processes and denser pad arrangements, which require a large number of testing probes, making design and testing challenging and costly.
Innovation Solution
A circuit that uses testing switches and pad switches to reduce the number of testing probes by grouping pads into sets, allowing a single testing probe to test multiple pads, thereby simplifying the design and reducing costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the number of testing probes is increased to test all pads, then the testing coverage is improved, but the device complexity and cost increase
Solution Approach 1:
Each testing probe is designed to perform multiple functions by sequentially testing different pads on the same die through wafer movement, rather than requiring one dedicated probe per pad. This multi-functionality reduces the total number of probes needed while maintaining comprehensive testing coverage.
Solution Approach 2:
The testing system incorporates dynamic wafer movement to enable different pads to be brought into contact with the same testing probe at different time points. This dynamic repositioning allows a limited number of probes to access multiple pads sequentially, reducing static hardware requirements.
2Measurement precision
If the number of testing probes is increased to match the number of pads, then the testing accuracy is improved, but the manufacturing cost increases
Solution Approach 1:
Testing probes are designed to serve multiple pads through sequential contact enabled by wafer movement, making each probe a universal testing element rather than a dedicated component. This reduces the total probe count and associated manufacturing costs while preserving testing accuracy through proper signal routing and timing.
Solution Approach 2:
The testing process employs periodic wafer movement to bring different pads into contact with the same probe in a systematic sequence. This periodic repositioning ensures that each pad receives accurate testing attention while utilizing the same physical probe infrastructure, reducing overall system cost.
3Productivity
If the pad density is increased to maximize productivity, then the area utilization is improved, but the testing difficulty increases
Solution Approach 1:
The system uses dynamic wafer positioning to overcome the challenges of high pad density. By moving the wafer to precisely bring specific high-density pads into contact with appropriate probes, the system maintains testing capability despite increased pad crowding that would make static testing arrangements infeasible.
Solution Approach 2:
The testing approach transitions from a static two-dimensional probe-pad matching problem to a dynamic solution that utilizes the time dimension through sequential wafer movement. This allows pads in high-density arrangements to be accessed systematically without requiring proportional increases in probe density.
Data Source
AI summary
The present invention relates to a circuit for multi-pads test, which is used for testing a plurality of pads. The circuit comprises one or more testing circuits, a plurality of testing switches, and a plurality of pad switches. The plurality of testing switches is coupled between the testing circuits and the plurality of pads, respectively; the plurality of pad switches is coupled between the pads, respectively. Thereby, by coordination of the plurality of pad switches and the plurality of testing switches, the number of testing probes of the testing apparatus for testing the pads can be reduced, the design difficulty of the testing apparatus can be reduced, and thus the costs can be reduced.