Multi-pattern Polishing Pad for CMP Roll-off Control
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Solution Overview
Problem
Chemical mechanical polishing (CMP) tools with single-pattern polishing pads often fail to maintain a roll-off profile within a threshold, leading to non-bonding issues during semiconductor substrate stacking, which affects yield and resource efficiency.
Innovation Solution
A CMP tool with a polishing pad featuring multiple regions, each with a distinct pad surface pattern, allowing for controlled polishing rates to consistently form a roll-off profile that satisfies the necessary threshold, thereby improving semiconductor substrate stacking processes and reducing resource requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single-pattern polishing pad is used, then the device complexity is reduced, but the manufacturing precision of the roll-off profile deteriorates
Solution Approach 1:
The polishing pad is divided into multiple regions with different surface patterns (e.g., first region with first pattern, second region with second pattern). Each region corresponds to different portions of the semiconductor substrate and provides different polishing rates, enabling precise control of the roll-off profile while maintaining manageable device complexity through modular regional design.
Solution Approach 2:
Different regions of the polishing pad are assigned different surface patterns and polishing characteristics tailored to specific needs. The first region may have a pattern optimized for central substrate areas while the second region has a different pattern for peripheral areas, allowing local optimization of polishing quality without requiring complete redesign of the entire pad.
2Ease of manufacture
If a single-pattern polishing pad is used, then the ease of manufacture is improved, but the productivity of semiconductor substrate stacking deteriorates
Solution Approach 1:
The polishing pad fabrication process is segmented into regions that can be manufactured using standardized techniques, then assembled or integrated into a complete pad. This allows manufacturers to produce multiple region pads without requiring entirely new manufacturing approaches, maintaining ease of manufacture while achieving high stacking yield through improved roll-off profile control.
Solution Approach 2:
The surface pattern parameters (e.g., groove depth, spacing, orientation) are varied across different regions of the polishing pad to optimize polishing rates for different substrate areas. These parameter changes are implemented within existing manufacturing capabilities, improving substrate stacking productivity without fundamentally changing the manufacturing process.
3Device complexity
If a single-pattern polishing pad is used, then the device complexity is reduced, but the reliability of substrate bonding deteriorates
Solution Approach 1:
Different regions of the polishing pad are designed with specific surface patterns optimized for creating appropriate roll-off profiles in different substrate areas. This local optimization ensures that bonding surfaces have the precise characteristics needed for reliable bonding, with the first region addressing central substrate requirements and the second region addressing peripheral requirements.
Solution Approach 2:
The polishing pad is segmented into functional regions that independently contribute to different aspects of substrate preparation for bonding. This segmentation allows each region to be optimized for its specific function while working together to achieve reliable substrate bonding, improving overall system reliability without excessive complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The CMP tool effectively maintains a consistent roll-off profile, enhancing the yield of semiconductor substrate stacking and optimizing resource utilization by employing a polishing pad with gradient zones and varying surface patterns to control polishing rates across different substrate regions.
Implementation Method 1
The slurry and polishing pad act as an abrasive that polishes or planarizes one or more layers (e.g., metallization layers) of the semiconductor substrate
Data Source
AI summary
Some implementations herein describe a chemical-mechanical planarization tool including a polishing pad. The chemical-mechanical planarization tool including the polishing pad may perform a polishing operation to a semiconductor substrate. The polishing operation may generate, along a perimeter of the semiconductor substrate, a roll-off profile that satisfies a threshold. The polishing pad includes two or more regions, where each region includes a different pad surface pattern. Each region including a different pad surface pattern may correspond to a different polishing rate. Techniques using the polishing pad having such zone and pad surface pattern combinations allow for a focused and a controlled polishing of the semiconductor substrate, including along the perimeter of the semiconductor substrate to tightly control the roll-off profile.