Multi-Phase Shader Register Allocation for Variable Fragment Rates
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Solution Overview
Problem
Current graphics processing systems inefficiently allocate registers based on the largest possible fragment size, leading to resource consumption and performance impediment when handling variable fragment shading rates.
Innovation Solution
A method and system for allocating registers based on the specific fragment shading rate, using a compiler to provide data on required registers per fragment and sample, and computing the necessary resources for dual-phase tasks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If registers are allocated based on the largest possible fragment size, then the system can handle any fragment size, but resource consumption increases and processor performance is impeded
Solution Approach 1:
The patent implements dynamic register allocation where the number of registers allocated to a fragment shader is determined at runtime based on the actual fragment shading rate. The system computes the required registers as: registers_per_fragment = registers_per_sample * samples_per_fragment, where samples_per_fragment varies dynamically. This allows the system to adapt register allocation to actual needs rather than using a fixed maximum allocation.
Solution Approach 2:
The system changes the parameter of register allocation from a static value (based on maximum fragment size) to a dynamic value (based on actual fragment shading rate). The compiler provides metadata about register requirements per sample, and the runtime system uses this along with the actual samples_per_fragment to compute the precise register allocation needed for each execution context.
2Adaptability or versatility
If registers are allocated based on the largest possible fragment size, then all fragment sizes can be supported, but processor performance deteriorates
Solution Approach 1:
The system dynamically adjusts register allocation based on the actual fragment shading rate rather than using a static maximum allocation. This dynamic approach ensures that processors can execute more shader instances in parallel because each instance consumes only the registers it actually needs, thereby improving overall processor productivity and throughput.
Solution Approach 2:
The patent changes the register allocation parameter from a conservative static value to a precise dynamic value computed at runtime. This parameter change enables better resource utilization and allows the processor to achieve higher performance by reducing the overhead associated with allocating excessive registers to each shader instance.
3Ease of manufacture
If a constant anti-aliasing rate is used for the entire image, then implementation is simple, but variable shading rates cannot be achieved
Solution Approach 1:
The system transitions from a static anti-aliasing rate to a dynamic fragment shading rate that can vary across different regions of the image. The fragment shading rate is determined by the ratio of samples_per_fragment to the coverage sampling rate, allowing different regions to use different rates based on their complexity and importance requirements.
Solution Approach 2:
The patent implements local quality by allowing different fragment shading rates in different regions of the image. Important regions with high detail requirements can use higher sampling rates for better quality, while less important regions can use lower rates for improved performance. This local adaptation is achieved through the dynamic computation of samples_per_fragment for each fragment.
Data Source
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AI summary
Within a graphical processing system a plurality of different shading programs may be executed by a single processor over multiple threads. For each shading program a plurality of registers are used to store data for the respective shading program. Thus, for multiple shading programs executed over multiple threads a plurality of registers are allocated to each program, or thread, being executed. However, there are a limited number of registers available and therefore efficient allocation of the registers optimises performance. Often an unnecessary number of registers is allocated to each shading program but the present invention provides a method of allocating the correct number of registers based on the size of the fragments being shaded.