Multi-PHY Shim Layer for 10GBASE-T Bandwidth Scaling
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Solution Overview
Problem
The rapid increases in Ethernet transmission rates, such as from 10 Gbit/s to 40 Gbit/s or 100 Gbit/s, come with significant implementation costs including system complexity, physical plant upgrades, and increased power consumption, hindering the deployment of next-generation Ethernet devices over structured cabling.
Innovation Solution
A cost-effective solution is achieved by reusing existing Ethernet device architectures and implementing a multi-PHY core configuration with a shim layer to support higher transmission rates, allowing for efficient scaling and reduced implementation costs by leveraging existing cabling and PHY components.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If transmission rate is increased from 10 Gbit/s to 40 Gbit/s or 100 Gbit/s, then bandwidth is improved, but system complexity increases
Solution Approach 1:
The patent segments the high-speed transmission system into multiple independent 10 Gbit/s PHY cores, where each core handles a portion of the total bandwidth. This segmentation allows the system to achieve 40 Gbit/s or 100 Gbit/s aggregate bandwidth while each individual PHY core maintains the simpler 10 Gbit/s design, thereby reducing overall system complexity.
Solution Approach 2:
The patent combines multiple 10 Gbit/s PHY cores into a single N0G MAC interface, merging their capabilities to achieve higher aggregate transmission rates. This consolidation allows the system to leverage existing 10 Gbit/s PHY technology while achieving 40 Gbit/s or 100 Gbit/s bandwidth through the aggregation of multiple cores.
2Productivity
If transmission rate is increased to 40 Gbit/s or 100 Gbit/s, then bandwidth is improved, but physical plant upgrades are required
Solution Approach 1:
By segmenting the high-speed link into multiple 10 Gbit/s channels, the patent enables the use of existing Category 6A or Category 7 cabling infrastructure that supports 10 Gbit/s, rather than requiring new cabling for 40 Gbit/s or 100 Gbit/s. Each PHY core uses separate wire pairs, allowing deployment over existing physical plants.
Solution Approach 2:
The patent copies the proven 10 Gbit/s PHY design multiple times to create N independent cores, each operating at 10 Gbit/s over existing cabling. This copying approach allows the system to achieve higher aggregate bandwidth without requiring new physical plant technology, as each copied PHY core uses the same established 10 Gbit/s interface specifications.
3Productivity
If transmission rate is increased to 40 Gbit/s or 100 Gbit/s, then bandwidth is improved, but power consumption increases
Solution Approach 1:
The patent segments the high-power 40 Gbit/s or 100 Gbit/s transmission into multiple lower-power 10 Gbit/s PHY cores, where each core consumes less power than a single high-speed core would require. This segmentation allows the system to achieve high aggregate bandwidth while keeping individual power consumption at manageable levels.
Solution Approach 2:
The patent combines multiple low-power 10 Gbit/s PHY cores to achieve high aggregate bandwidth, where the total power consumption is the sum of individual core consumptions. This approach is more power-efficient than implementing a single high-speed interface, as it leverages the efficiency of established 10 Gbit/s technology across multiple channels.
4Ease of manufacture
If existing Ethernet device architectures are reused with multi-PHY core configuration, then implementation cost is reduced, but device complexity increases
Solution Approach 1:
The patent creates a universal platform where a single N0G MAC can work with N different 10 Gbit/s PHY cores, allowing the same base architecture to support various bandwidth configurations (10 Gbit/s, 20 Gbit/s, 40 Gbit/s, 100 Gbit/s). This multi-functionality reduces implementation costs by reusing the same MAC and PHY core designs across different performance levels.
Solution Approach 2:
The patent implements a dynamic configuration where the N0G MAC can adaptively enable or disable individual PHY cores based on bandwidth requirements. This dynamic approach allows the system to optimize performance and cost by activating only the necessary number of PHY cores, reducing the effective complexity for any given deployment scenario.
Data Source
AI summary
A system and method for forming N0GBASE-T. In one embodiment, N 10GBASE-T PHYs are matched to a N×10G MAC via a shim layer. The shim layer is designed to distribute data received from a higher rate MAC to multiple lower-rate PHYs on the transmit end, and to collect data received from multiple lower-rate PHYs to a higher rate MAC.