Multi-Plane Erase Verification for Semiconductor Memory
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Solution Overview
Problem
During a multi-plane erase operation in semiconductor devices, successful planes are incorrectly determined as failed due to failures in other planes, leading to unnecessary non-use of planes that actually passed the erase verifying operation.
Innovation Solution
A method and semiconductor device that determine and isolate failed planes during a multi-plane erase operation, allowing normal planes to continue functioning by performing a soft program operation on planes that passed the erase verifying process, even if the multi-plane erase operation fails.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a multi-plane erase operation is performed to reduce operating time, then productivity is improved, but reliability deteriorates because failures in some planes cause all selected planes to be determined as failed
Solution Approach 1:
The patent segments the plane verification process by introducing independent verification units for each plane. Instead of treating all planes as a single failed unit when one fails, the system divides verification into plane-specific operations, allowing successful planes to be identified and processed separately from failed planes.
Solution Approach 2:
The patent implements a feedback mechanism where verification results from each plane are fed back to the control circuit independently. The control circuit receives individual verification status for each plane and uses this feedback to determine whether to perform soft program operations on specific planes, rather than applying a blanket failure determination to all planes.
2Reliability
If all planes are determined as failed when any plane fails verification, then reliability is maintained, but loss of time increases due to unnecessary re-operations on successful planes
Solution Approach 1:
The patent segments the erase and verify operations into plane-specific independent processes. Each plane's verification result is evaluated separately, allowing the system to identify which planes actually succeeded and which failed, rather than treating all planes uniformly.
Solution Approach 2:
The patent recovers successful planes from the failed operation by identifying them through independent verification and performing soft program operations only on those planes that need remediation. This avoids the waste of re-processing planes that actually succeeded, while still maintaining data integrity through targeted correction operations.
3Loss of time
If independent plane verification is implemented to identify passed planes, then loss of time is reduced by avoiding unnecessary re-operations, but device complexity increases
Solution Approach 1:
The control circuit is segmented into specialized functional units: verification units that independently check each plane, a determination unit that evaluates verification results, and a control unit that directs subsequent operations. This modular segmentation manages complexity by distributing verification logic across multiple specialized components rather than requiring one complex centralized controller.
Solution Approach 2:
The verification units and control circuit are designed to handle multiple planes simultaneously using the same verification logic and control mechanisms. This multi-functionality allows the system to verify any number of planes with a standardized set of components, reducing the complexity increase that would result from implementing independent verification for each plane separately.
Data Source
AI summary
A semiconductor device and a method of operating the same are provided. The method includes performing a multi-plane erase operation on selected planes; determining that the multi-plane erase operation has failed when a number of erase loops reaches a maximum number without successful completion of the multi-plane erase operation; determining whether there are passed planes amongst the selected planes; and performing a soft program operation on the passed planes.