Multi-plane Flash Memory Data Transfer Scheme
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Solution Overview
Problem
Multi-plane flash memory devices face performance issues due to low read, program, and erase speeds, particularly as the number of memory planes increases, and the need to increase page buffer sizes to accommodate multiple data pages leads to higher costs and complexity.
Innovation Solution
Implementing a vertical data transfer scheme that programs data across all channels into a first plane in parallel, allowing data from succeeding planes to be cached and programmed after the initial plane's operation is complete, thereby reducing the size requirements for page buffers and enhancing programming speed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If data from multiple channels is transferred to buffers during wait READ/PROGRAM interval to improve data transfer time, then data transfer time for one channel is improved, but system performance is reduced when data is transferred from multiple channels
Solution Approach 1:
The patent transitions from horizontal data transfer (channel-by-channel) to vertical data transfer (plane-by-plane), changing the dimension of data organization. Data from multiple channels is first collected in buffers, then transferred vertically to multiple planes in parallel, allowing simultaneous programming operations across planes while maintaining buffer efficiency.
Solution Approach 2:
The patent performs preliminary data collection in buffers during wait intervals before initiating parallel programming operations. Data from multiple channels is pre-loaded into buffers during idle periods, then rapidly transferred to planes when programming operations are ready, eliminating idle time and maximizing throughput.
2Adaptability or versatility
If page buffer size is increased to accommodate multiple data pages, then multiple data pages can be programmed, but device complexity and cost increase
Solution Approach 1:
The patent divides the data transfer process into segments: data first enters buffers in channels, then is transferred vertically to multiple planes. This segmentation allows standard-sized buffers to handle multiple pages by processing them across multiple planes sequentially or in parallel, eliminating the need for large buffers to hold all pages simultaneously.
Solution Approach 2:
By organizing data transfer vertically across planes rather than horizontally within a single plane, the patent enables multiple pages to be programmed using standard buffer sizes. The vertical dimension provides additional storage capacity distributed across planes, replacing the need for larger horizontal buffer capacity.
Data Source
AI summary
Systems, methods and computer program products for programming data into a multi-plane memory device employ a multi-plane data order. To allow multiple data pages to be programmed without a need to increase the size of page buffers, in some implementations, a data transfer scheme at which the data pages are programmed can be manipulated. Specifically, data across all channels can first be programmed into a first plane of the multi-plane flash memory device in parallel. While the data transfer program operation is in progress, data to be programmed into a succeeding plane (e.g., plane “1”) can be read into and cached in one or more page buffers. After the data transfer program for the first plane is complete, data cached in the page buffers can be immediately latched and programmed into the multi-plane flash memory device.