Multi-Port Memory Arbitration with Configurable Time-Slot Priorities

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Solution Overview

Problem

Existing memory controller technologies are inadequate in determining an efficient order of priority for multiple ports during simultaneous data transfers, leading to suboptimal performance and resource utilization.

Innovation Solution

A programmable device with arbitration circuitry that is configurable during field programming to define priority orders for command ports, ensuring that commands are processed in succession from the highest priority port available.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If multiple command ports simultaneously request data transfer through the memory interface, then resource utilization increases, but determining an efficient priority order becomes complex and performance degrades

Engineering Contradiction:
Improveresource utilizationVSAvoidpriority determination complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The arbitration process is segmented into multiple time slots, with each time slot having a dedicated priority definition. This divides the complex multi-port arbitration problem into manageable sequential steps, where each time slot handles a specific priority ordering of ports.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The priority definitions are made configurable through field programming, allowing the system to dynamically adapt priority orders based on different operational requirements. The arbitration circuitry can be reconfigured to change the number and ordering of priority definitions without hardware changes.

Inventive Principle:
Principle #15Dynamics

2Productivity

If a fixed priority scheme is used for command ports, then arbitration is simple, but performance optimization for different scenarios is limited

Engineering Contradiction:
Improvedata transfer efficiencyVSAvoidarbitration configuration
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The priority definitions are implemented as configurable parameters that can be modified through field programming. This allows the system to change priority parameters to match different performance requirements while maintaining a relatively simple arbitration structure.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

Priority definitions are pre-configured through field programming before operation. This preliminary configuration step establishes optimized priority schemes for different scenarios, allowing the arbitration logic itself to remain simple during actual data transfer operations.

Inventive Principle:
Principle #10Preliminary action

3Productivity

If existing arbitration techniques are used, then implementation is straightforward, but performance and resource utilization are suboptimal

Engineering Contradiction:
ImproveperformanceVSAvoidarbitration mechanism
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The arbitration mechanism is segmented into multiple time slots, each with its own priority definition. This segmentation allows the system to achieve superior performance by systematically evaluating ports in different priority orders across multiple opportunities, rather than using a single static priority scheme.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The arbitration circuitry is designed to be universally applicable to different scenarios through configurable priority definitions. The same basic arbitration structure can serve multiple functions by changing the priority configuration, eliminating the need for different hardware designs for different performance scenarios.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS8161249B1Method and apparatus for multi-port arbitration using multiple time slots
Publication Date: 2012.04.17 XILINX INC
  • US8161249B1 patent drawing
  • US8161249B1 patent drawing
  • US8161249B1 patent drawing

AI summary

An apparatus includes a programmable device that has an interface and command ports that can each receive commands, each command requesting an information transfer through the interface. A technique relating to the device involves: selecting during field programming a number of priority definitions; configuring each of the priority definitions during field programming to specify an order of priority for a group of the command ports; and using the priority definitions in succession and, for each of the priority definitions, causing a command to be accepted from the command port of highest priority that contains a command.