Multi-Port Memory Bank Sharing with Availability Indications
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Solution Overview
Problem
In multiprocessor architectures, shared memory banks often lead to data corruption and inconsistencies due to simultaneous access by multiple components, necessitating an improved method for coordinating and managing access to shared memory banks.
Innovation Solution
A multi-port memory device with bank availability indications and access control mechanisms, including priority-based reservation and electronic fuses, ensures exclusive access and prevents data corruption by managing bank availability and access rights among components, while also employing a local refresh scheme to maintain memory consistency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple components access shared memory banks simultaneously, then information sharing between components is enabled, but data corruption occurs due to write conflicts
Solution Approach 1:
The patent implements a reservation mechanism where components must reserve a memory bank before accessing it. The bank availability indication is updated in advance to reflect the reserved state, preventing other components from attempting to access the same bank simultaneously. This preliminary reservation action eliminates write conflicts while maintaining information sharing capability.
2Ease of operation
If bank availability indications are updated immediately upon reservation, then access coordination is improved, but components may miss updates due to timing issues
Solution Approach 1:
The patent maintains continuous monitoring of bank availability indications by components. Instead of relying on single-point updates, the system ensures that availability status is continuously tracked and reflected, allowing components to detect changes reliably regardless of timing. This continuous action approach ensures neither access coordination nor detection reliability is compromised.
3Speed
If a component reads from memory too soon after another component writes, then read speed is improved, but old information is read due to premature access
Solution Approach 1:
The patent implements a feedback mechanism where components check bank availability indications before accessing memory. The writing component updates the availability indication when it begins writing, and the reading component continuously monitors this indication. The read operation is triggered only when the availability indication confirms the write is complete, ensuring information accuracy while minimizing delay through continuous feedback monitoring.
4Device complexity
If bank sharing is implemented without reservation mechanisms, then device complexity is reduced, but data corruption results from simultaneous writes
Solution Approach 1:
The patent introduces bank availability indications as an intermediary mechanism between multiple components and shared memory banks. This intermediary provides a simple signaling interface that coordinates access without requiring complex control logic in each component. The availability indication acts as a mediator that prevents simultaneous writes while maintaining relatively simple device architecture.
Data Source
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AI summary
A method and system for sharing banks (110) of memory in a multi-port (120) memory device (100) between components is provided. The multi-port memory device includes multiple ports to which components of a system are attached, and multiple banks of memory within the multi-port memory device that are shared by each of the ports. A bank availability pin is added to each port for each bank of memory. The bank availability pin is signaled when the bank is available to a particular port and unsignaled when the bank is unavailable. Thus, the multi-port memory device can be shared by several components simultaneously with only a small amount of additional hardware to support the sharing. Also provided are methods for refreshing the banks of memory.