Multi-port Memory Device Serial I/O Interface
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Solution Overview
Problem
Conventional single-port memory devices with parallel I/O interfaces face limitations in supporting multiple concurrent operations due to their design, which hinders efficient implementation of multimedia functions and increases manufacturing costs as the number of signal lines grows with distance, making it difficult to allocate proper memory amounts and reducing overall memory device efficiency.
Innovation Solution
A multi-port memory device with a serial I/O interface is developed, featuring multiple ports for independent data communication with external devices, along with bank control units that manage data transmission between banks and ports, allowing for parallel data communication and efficient data processing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a parallel I/O interface is used to transmit multi-bit data simultaneously, then data processing speed is improved, but the number of signal lines increases leading to higher manufacturing costs
Solution Approach 1:
The patent replaces the parallel mechanical connection system with a serial communication system. Instead of using multiple parallel signal lines to transmit multi-bit data simultaneously, the invention uses a serial I/O interface that transmits data bit-by-bit through fewer signal lines, thereby reducing manufacturing costs while maintaining data processing capability
Solution Approach 2:
The patent changes the data transmission parameter from parallel (multiple bits simultaneously) to serial (one bit at a time). This parameter change allows the system to achieve the same data transfer function using fewer signal lines, reducing the complexity and cost of the physical connection system
2Speed
If a single port memory device is used with parallel I/O interface, then data transmission speed is high, but the number of buses increases with distance leading to higher manufacturing costs
Solution Approach 1:
The patent replaces the parallel bus system with a serial communication system. By using serial I/O interface instead of parallel buses, the invention reduces the number of signal lines that need to extend over distance, thereby reducing manufacturing costs for long-distance connections while maintaining data transmission capability
3Adaptability or versatility
If multiple independent memory devices are configured to support multimedia functions, then functional versatility is improved, but concurrent operations cannot be performed and memory allocation efficiency decreases
Solution Approach 1:
The patent merges multiple independent memory devices into a single multi-port memory device. By integrating multiple ports and banks into one device, the invention enables concurrent operations across different ports while improving memory allocation efficiency. The multiple banks can be independently accessed through different ports, allowing simultaneous data processing for different multimedia functions
Solution Approach 2:
The patent creates a universal memory device that can perform multiple functions through its multi-port architecture. Each port can independently access different banks, allowing the single device to support various multimedia functions simultaneously, replacing the need for multiple specialized memory devices
Data Source
AI summary
A multi-port memory device includes a plurality of ports located at a center region of the multi-port memory device, each for performing a data communication with a corresponding external device; a plurality of banks arranged at upper and lower regions of the multi-port memory device in a row direction on the basis of the plurality of ports; and first and second global I/O data buses arranged in the row direction between the banks and the ports, each for independently performing a data transmission between the banks and the ports.