Multi-rail Sense Circuit with Pre-charge Transistors for Memory Read Speed
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Solution Overview
Problem
Conventional techniques for improving the performance of sense circuits in memory structures often result in significant increases in power and/or area consumption, leading to undesirable trade-offs.
Innovation Solution
A multi-rail sense circuit structure is introduced, utilizing a combination of pre-charge transistors and positive voltage rails set at different voltage levels to achieve improved sensing speed and reduced power consumption through a voltage equalization process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If conventional techniques are used to improve sensing speed, then performance is improved, but power consumption increases significantly
Solution Approach 1:
The sense nodes are pre-charged to a voltage level (VDD2) before the sensing operation begins. This preliminary action equalizes the voltage on both sense nodes in advance, so that when sensing starts, the nodes are already in a known state, reducing the time and power required for the actual sensing operation.
Solution Approach 2:
The voltage supply is segmented into multiple rails with different voltage levels (VDD1 and VDD2). The pre-charge transistor connects sense nodes to VDD2 for pre-charging, while cross-coupled transistors connect to VDD1 for the main sensing operation. This segmentation allows different phases of operation to use different voltage levels, optimizing both speed and power consumption.
2Speed
If conventional techniques are used to improve sensing speed, then performance is improved, but area consumption increases significantly
Solution Approach 1:
The sense circuit structure serves multiple functions: the pre-charge transistors perform both pre-charging and voltage equalization, while the cross-coupled transistors perform sensing and latching. The voltage comparator also serves dual purposes by detecting voltage differences and driving the output. This multi-functionality reduces the need for separate dedicated circuits, thereby reducing area consumption.
3Speed
If multiple voltage rails are used for pre-charge and sensing, then sensing speed improves, but circuit complexity increases
Solution Approach 1:
Different parts of the circuit are assigned different voltage levels based on their specific functional requirements. The pre-charge transistors use VDD2 for controlled pre-charging, while the cross-coupled transistors use VDD1 for strong sensing capability. The voltage comparator operates with voltages derived from these rails. This local differentiation of voltage quality optimizes performance without requiring a completely complex multi-rail system throughout the entire circuit.
Data Source
AI summary
Disclosed are a sense circuit and memory structure incorporating the sense circuit. The sense circuit is connected to voltage rails at VDD1 and VDD2, respectively, where VDD2˜½*VDD1. During a sensing operation, VDD1 provides power to develop a voltage differential between Vdata and Vref on sense nodes. A voltage comparator samples Vdata and Vref and, based on a detectable voltage differential (minVdiff), outputs a data output value. To increase the speed at which minVdiff is reached, an equalization process is performed at the initiation of the sensing operation and includes using pre-charge transistors to quickly equalize the sense nodes to VDD2. Following equalization, Vdata and Vref only need to be pulled up or down from VDD2. Thus, minVdiff is reached faster and sampling by the voltage comparator can be performed earlier in time, reducing the overall time required for performing the sensing operation and for powering the sense circuit.