Multi-Rate ADC Spur Reduction Using Common-Mode Filtering
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Solution Overview
Problem
Analog-to-digital converters (ADCs) often introduce spurious frequency information, limiting their dynamic range and performance in high-performance systems, as conventional methods like commutating or interleaving ADCs do not effectively reduce spurs, and may even increase noise.
Innovation Solution
The method involves clocking multiple ADCs at different sampling rates derived from a common clock base, with phase-coherent or non-phase-coherent frequencies, to generate common-bandwidth signals that are then filtered using common-mode filtering to reduce spurious information and enhance the spurious-free dynamic range.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If multiple ADCs are clocked at different sampling rates to reduce spurs, then spurious-free dynamic range is improved, but device complexity increases
Solution Approach 1:
The system divides the signal processing task across multiple ADCs (first ADC, second ADC, etc.), each operating at different sampling rates. By segmenting the conversion process and combining results through normalization and common-mode filtering, the system achieves superior spur reduction while maintaining manageable complexity through modular architecture.
Solution Approach 2:
The patent combines outputs from multiple ADCs with different sampling characteristics to create a composite digital output signal. This composite approach leverages the strengths of each ADC operating at different rates, similar to how composite materials combine different properties to achieve superior overall performance.
2Productivity
If conventional methods like commutating or interleaving ADCs are used, then productivity is improved, but object-generated harmful factors increase
Solution Approach 1:
Instead of using traditional commutating or interleaving methods that maintain fixed sampling rates, the patent changes the sampling rate parameter for each ADC. By operating ADCs at different sampling rates (e.g., first ADC at rate Fs1, second ADC at rate Fs2), the system pushes spur frequencies to different locations in the spectrum, allowing them to be filtered more effectively while maintaining high productivity.
Data Source
AI summary
Methods, systems, computer-readable media, and apparatuses for spurious information reduction in a data signal are presented. One example of such an apparatus includes a data converter including a plurality of analog-to-digital converters (ADCs) and configured to produce a plurality of sampled signals, a normalizer configured to obtain a plurality of common-bandwidth signals from at least the plurality of sampled signals, and a common-mode filter configured to produce a digital output signal based on the plurality of common-bandwidth signals.