Multi-site Probe Card for Concurrent Wafer Testing

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Solution Overview

Problem

The increasing complexity of semiconductor integrated circuit (IC) manufacturing and demand for more test patterns lead to significantly increased test time and cost due to the generation of charges during processes like grinding, etching, and deposition in three-dimensional (3D) ICs, necessitating more efficient wafer testing methods.

Innovation Solution

A multi-site probe card system is used for wafer testing, featuring first and second probe sites that simultaneously perform different tests on the same die, allowing for concurrent ESD discharge, burn-in, and manufacture tests, reducing overall testing time and cost by optimizing probe pad and needle footprints and arrangements.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If more test patterns are performed on each die to ensure proper operation, then testing completeness is improved, but test time and test cost are dramatically increased

Engineering Contradiction:
Improvetesting completenessVSAvoidtest time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The probe card is divided into multiple independent probe sites (first probe site, second probe site, etc.), each capable of performing different tests simultaneously on the same die. This segmentation allows parallel testing of multiple functions without increasing total test time.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Multiple test functions (ESD discharge test, burn-in test, manufacture test) are merged into a single integrated probe card system that performs all tests concurrently on the same die, eliminating the need for sequential testing and reducing overall test time.

Inventive Principle:
Principle #5Merging (Combining)

2Reliability

If more test patterns are performed on each die, then testing completeness is improved, but test cost is dramatically increased

Engineering Contradiction:
Improvetesting completenessVSAvoidtest cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The probe card is designed as a universal testing platform with multiple probe sites that can perform various test functions simultaneously. This multi-functionality eliminates the need for multiple separate test setups, thereby reducing test cost while maintaining comprehensive testing coverage.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

Multiple test functions are combined into a single probe card system, allowing concurrent execution of ESD discharge tests, burn-in tests, and manufacture tests. This consolidation reduces equipment costs and operational expenses associated with multiple separate testing systems.

Inventive Principle:
Principle #5Merging (Combining)

3Productivity

If traditional single-site probe card is used, then device complexity is low, but testing efficiency is poor

Engineering Contradiction:
Improvetesting efficiencyVSAvoidprobe card complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The probe card is segmented into multiple independent probe sites, each with its own probe needles and test circuitry. This segmentation enables parallel testing operations, significantly improving testing efficiency despite the increased structural complexity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The probe card transitions from a single-site (one-dimensional) architecture to a multi-site (two-dimensional) array configuration. This dimensional expansion allows multiple tests to be performed simultaneously on different locations of the die, dramatically improving testing throughput.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables simultaneous testing of multiple functions on each die, reducing the overall testing time and cost by allowing two types of tests to be performed in the same time period, thereby improving the efficiency of wafer testing processes.

Implementation Method 1

One of the at least one first probe site touches the first probe pads of a die to perform the first test at a first time period... perform ESD discharge

Methodology Applied
Scientific EffectElectrostatic Discharge: Electrostatic Discharge

Data Source

PatentUS9448285B2Method and apparatus of wafer testing
Publication Date: 2016.09.20 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US9448285B2 patent drawing
  • US9448285B2 patent drawing
  • US9448285B2 patent drawing

AI summary

A system for testing a wafer includes a probe card and a wafer. The probe card includes at least one first probe site and at least one second probe site. The wafer includes a plurality of dies. The at least one first probe site is arranged for a first test, and the at least one second probe site is arranged for a second test. Each of the plurality of dies corresponds to first probe pads and second probe pads. Each of the at least one first probe site is arranged to touch the first probe pads of each of the plurality of dies. Each of the at least one second probe site is arranged to touch the second probe pads of each of the plurality of dies.