Multi-Stage ADC Conversion Without Track-and-Hold Noise
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing analog-to-digital converters (ADCs) face challenges in achieving high speed and accuracy, particularly in applications requiring fast conversion and high resolution, such as autonomous driving sensors.
Innovation Solution
The proposed solution involves an apparatus and method for fast analog-to-digital conversion, which includes a first amplification circuit to amplify differences between an analog input signal and reference voltages, followed by a second amplification circuit to amplify differences among the output voltages of the first capacitors, and a comparison circuit to generate a digital output signal by comparing the voltages of the second capacitors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If traditional ADC architecture with track-and-hold operations is used, then conversion accuracy can be maintained, but conversion speed is limited and noise is increased
Solution Approach 1:
The conversion process is divided into multiple parallel stages: a first conversion unit performs initial conversion at high speed, while a second conversion unit performs subsequent conversion. This segmentation allows the system to achieve high overall conversion speed without sacrificing accuracy, as each stage operates independently and contributes to the final result.
Solution Approach 2:
The first conversion unit performs preliminary analog-to-digital conversion before the second conversion unit operates. This preliminary action prepares the signal in advance, enabling the second stage to complete the conversion process quickly without compromising the final conversion accuracy.
2Productivity
If traditional ADC architecture is used, then conversion process is complete, but track-and-hold operations increase noise and limit sampling frequency
Solution Approach 1:
The invention extracts and eliminates the track-and-hold operation from the conversion architecture. By removing this component, the system avoids the noise and sampling frequency limitations that track-and-hold operations impose, while still achieving accurate high-speed conversion through the multi-stage parallel conversion approach.
3Measurement precision
If high resolution ADC is designed, then conversion accuracy is improved, but conversion speed decreases
Solution Approach 1:
The high-resolution conversion process is segmented into multiple parallel conversion units operating at different stages. The first conversion unit handles initial high-speed conversion, while the second conversion unit refines the result with higher precision. This segmentation allows the system to achieve both high resolution and high conversion speed simultaneously.
Solution Approach 2:
The first conversion unit performs preliminary conversion at high speed to establish a baseline digital representation. This preliminary action enables the second conversion unit to focus on refining the precision without being constrained by speed requirements, thereby achieving high resolution while maintaining overall conversion speed.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables high-speed and accurate analog-to-digital conversion by eliminating the need for track-and-hold operations, thereby reducing noise and increasing sampling frequency, which is particularly beneficial for applications like autonomous driving.
Implementation Method 1
a first amplification circuit configured to receive the analog input signal and a plurality of reference voltages and configured to amplify differences between the analog input signal and the plurality of reference voltages
Implementation Method 2
a plurality of first capacitors configured to respectively store charges corresponding to signals outputted by the first amplification circuit
Implementation Method 3
a second amplification circuit configured to amplify differences among voltages of the plurality of first capacitors
Implementation Method 4
a plurality of second capacitors configured to respectively store charges corresponding to signals outputted by the second amplification circuit
Implementation Method 5
a comparison circuit configured to generate the digital output signal by comparing voltages of the plurality of second capacitors with each other
Data Source
AI summary
An apparatus configured to convert an analog input signal into a digital output signal may include a first amplification circuit configured to receive the analog input signal and a plurality of reference voltages and amplify differences between the analog input signal and the plurality of reference voltages; a plurality of first capacitors configured to respectively store charges corresponding to signals outputted by the first amplification circuit; a second amplification circuit configured to amplify differences among voltages of the plurality of first capacitors; a plurality of second capacitors configured to respectively store charges corresponding to signals outputted by the second amplification circuit; and a comparison circuit configured to generate the digital output signal by comparing voltages of the plurality of second capacitors with each other.