Multi-State OTP Memory Circuit for Two-Bit Secure Storage
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Solution Overview
Problem
Traditional one-time programmable (OTP) memory cells can only store one bit of data, making them vulnerable to brute-force attacks, and there is a growing need for higher levels of hardware security in system-on-chip (SoC) designs that require non-volatile, low power consumption, and low-area overhead memory cells.
Innovation Solution
A multi-state one-time programmable (MSOTP) memory circuit is developed, comprising a memory cell with MOS storage and access transistors, a programming voltage driving circuit, and control circuits, enabling the storage of two bits per cell through controlled breakdown states and non-breakdown states between the gate and electrode, with a charge pump circuit to generate writing and reading potentials.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional OTP memory cells are used, then the structure is simple and area overhead is low, but they can only store one bit of data making them vulnerable to brute-force attacks
Solution Approach 1:
The memory cell is segmented into multiple independent breakdown regions: a first breakdown region between the gate and first electrode, and a second breakdown region between the gate and second electrode. Each region can independently store one bit of data through breakdown state formation, enabling two bits storage capacity while maintaining a relatively compact structure.
Solution Approach 2:
The invention transitions from traditional single-bit storage to multi-bit storage by introducing an additional electrode dimension. The memory cell utilizes multiple electrodes (first electrode, second electrode, and gate) to create independent breakdown regions, effectively increasing the information storage dimension from one bit to two bits per cell.
2Loss of information
If multi-state memory cells are implemented to store two bits per cell, then security against brute-force attacks is improved, but the device complexity increases
Solution Approach 1:
The MOS storage transistor serves multiple functions: it acts as both a storage element and an access control element. The gate electrode controls both the breakdown state formation and the reading operation, while the first and second electrodes provide independent data storage paths. This multi-functionality reduces the need for separate dedicated components for each function.
Solution Approach 2:
The invention merges the storage function and access control function into a single MOS transistor structure. The gate electrode simultaneously controls the breakdown state formation during programming and the current flow during reading, combining what could have been separate components into one integrated device.
3Stability of the object's composition
If breakdown states are used to store data, then non-volatile storage is achieved, but the programming process requires precise voltage control increasing manufacturing complexity
Solution Approach 1:
The invention utilizes parameter changes in the MOS transistor characteristics, specifically the breakdown voltage parameter. By controlling the gate-to-electrode voltage to exceed the breakdown threshold, the transistor transitions from a non-conductive state to a conductive breakdown state, providing a clear binary distinction for data storage that is stable and detectable.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The MSOTP memory circuit enhances security by storing two bits per cell, making it resistant to brute-force attacks and maintaining low power consumption and area overhead, while providing flexible writing and reading modes.
Implementation Method 1
a first non-breakdown state or a first breakdown state exists between the gate and the first electrode of MOS storage transistor, and a second non-breakdown state or a second breakdown state exists between the gate and the second electrode of MOS storage transistor
Implementation Method 2
The charge pump circuit is configured to receive a direct current (DC) voltage from the voltage input terminal, boost the DC voltage to generate the writing control potential
Data Source
AI summary
The present disclosure provides a multi-state one-time programmable (MSOTP) memory circuit including a memory cell and a programming voltage driving circuit. The memory cell includes a MOS storage transistor, a first MOS access transistor and a second MOS access transistor electrically connected to store two bits of data. When the memory cell is in a writing state, the programming voltage driving circuit outputs a writing control potential to the gate of the MOS storage transistor, and when the memory cell is in a reading state, the programming voltage driving circuit outputs a reading control potential to the gate of the MOS storage transistor.