Concurrent Multi-Sub-Block Memory Access for Garbage Collection
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Solution Overview
Problem
As memory devices increase in size, the number of wordline tiers and pages per block increases exponentially, leading to longer garbage collection times and deterioration of quality of service metrics due to inefficient memory access operations.
Innovation Solution
Concurrent execution of memory access operations, such as program, read, and program-verify operations, on multiple memory sub-blocks using a shared sense module, allowing simultaneous channel potential establishment and data transfer across multiple selected sub-blocks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If memory devices increase in size with more wordline tiers and pages per block, then storage capacity increases, but garbage collection time increases and quality of service metrics deteriorate
Solution Approach 1:
The memory block is divided into multiple sub-blocks that can be independently accessed. The sense module is configured to perform read operations on multiple sub-blocks simultaneously by applying different bitline voltages to different sub-blocks, enabling parallel processing and reducing garbage collection time while maintaining high storage capacity
Solution Approach 2:
Multiple read operations on different sub-blocks are merged into a single simultaneous operation. The sense module combines the capability to read from multiple sub-blocks at once by applying appropriate voltage levels to bitlines connected to different sub-blocks, thereby reducing the total time required for garbage collection operations
2Ease of operation
If conventional sequential memory access operations are used on multiple sub-blocks, then operational simplicity is maintained, but execution time increases
Solution Approach 1:
The sense module merges multiple read operations into a single simultaneous operation by applying different bitline voltages to different sub-blocks. This allows sequential operations to be executed in parallel without complicating the control logic, as the sense module handles multiple sub-blocks through voltage level differentiation
Solution Approach 2:
The sense module is designed with multi-functionality to handle read operations on multiple sub-blocks simultaneously. A single sense module can perform what would traditionally require multiple separate operations by leveraging its ability to apply different voltages to different sub-blocks, reducing execution time while maintaining operational simplicity
Data Source
AI summary
Control logic in a memory device initiates a read operation associated with a memory block of a memory device. During the read operation, the control logic causes transmission, via a sense module, of first data from a first memory cell of a first sub-block of the set of sub-blocks to a page buffer circuit. During the read operation, the control logic causes transmission, via the sense module, of second data from a second memory cell of a second sub-block of the set of sub-blocks to the page buffer circuit.


