Multi-threshold Voltage Circuit Bias Control for Skew Reduction
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Solution Overview
Problem
Integrated circuits with multiple threshold voltage devices face challenges in maintaining designed threshold voltage relationships due to process variations, leading to threshold voltage tolerance and skew issues, which complicate timing closure and signal propagation.
Innovation Solution
A circuit and method that include monitor circuits, compare circuits, and a control unit to adjust bias voltages of field effect transistors (FETs) based on performance measurements, ensuring that the threshold voltage relationships are maintained within design specifications, thereby addressing threshold voltage tolerance and skew.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If devices with different threshold voltages are used in different portions of the integrated circuit, then power consumption is reduced and performance is increased, but threshold voltage tolerance and skew issues occur
Solution Approach 1:
The patent implements feedback by measuring the actual threshold voltages of FETs in the circuit and using this measurement information to adjust bias voltages applied to FET wells. The control circuit continuously monitors threshold voltage variations and dynamically adjusts bias voltages to compensate for process variations, thereby maintaining the designed threshold voltage relationships despite manufacturing tolerances.
Solution Approach 2:
The patent changes the bias voltage parameter applied to FET wells to compensate for threshold voltage variations. By adjusting the bias voltage in response to measured threshold voltage deviations, the system dynamically modifies the effective threshold voltage of FETs to maintain the intended performance characteristics and timing relationships.
2Use of energy by moving object
If devices with different threshold voltages are used in different portions of the integrated circuit, then power consumption is reduced and performance is increased, but threshold voltage skew occurs
Solution Approach 1:
The control circuit uses feedback from threshold voltage measurements to adjust bias voltages applied to different FET wells. This feedback mechanism compensates for skew between FETs with different threshold voltages by dynamically equalizing their effective threshold voltages, ensuring consistent timing behavior across the circuit while maintaining the performance and power benefits of using multiple threshold voltage devices.
Solution Approach 2:
The patent applies equipotentiality by adjusting bias voltages to equalize the effective threshold voltages of FETs across different wells. By making the threshold voltage potentials equivalent through bias adjustment, the system eliminates skew effects and ensures uniform timing characteristics despite using FETs with inherently different threshold voltages for power optimization.
3Reliability
If threshold voltage relationships are not maintained, then timing closure becomes difficult and signal propagation issues occur, but maintaining relationships requires complex control circuits
Solution Approach 1:
The control circuit performs self-service by automatically measuring threshold voltages and adjusting bias voltages without external intervention. The system uses its own internal resources (power, logic circuits) to monitor and correct threshold voltage deviations, thereby maintaining timing closure and signal propagation integrity while managing complexity through automation rather than external calibration procedures.
Solution Approach 2:
The patent replaces manual or external mechanical adjustment mechanisms with electronic measurement and control circuits. Instead of physical calibration or external trimming, the system uses electronic sensors to measure threshold voltages and electronic control elements to adjust bias voltages, thereby achieving timing closure through automated electronic feedback rather than mechanical or manual processes.
Data Source
AI summary
A circuit and a method for adjusting the performance of an integrated circuit, the circuit includes: first and second sets of FETs having respective first and second threshold voltages, the first threshold voltage different from the second threshold voltage; a first monitor circuit containing at least one FET of the first set of FETs and a second monitor circuit containing at least one FET of the second set of FETs; a compare circuit adapted to generate a compare signal based on a performance measurement of the first monitor circuit and a performance measurement of the second monitor circuit; and a control unit adapted to generate a control signal to a voltage regulator based on the compare signal, the voltage regulator adapted to supply a bias voltage to wells of FETs of the second set of FETs, the value of the bias voltage based on the control signal.


