Multi-Voltage ESD Clamp Circuit for Gate Oxide Protection
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Solution Overview
Problem
Existing ESD protection devices for semiconductor devices face challenges in effectively managing high voltage spikes and noise in high voltage applications, which can lead to damage such as blowing out the gate oxide.
Innovation Solution
The proposed solution involves a semiconductor device with an ESD clamp circuit that includes RC timer circuits, transistors implemented using the LDMOS technique, and a discharge control circuit. This design is capable of operating across multiple voltage domains, including 1.8V and 5V, and effectively manages ESD events by controlling the discharge current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If existing ESD protection devices are used, then basic ESD protection is provided, but they fail to effectively manage high voltage spikes and noise in high voltage applications
Solution Approach 1:
The ESD protection function is divided into multiple specialized circuits operating at different voltage domains. A first ESD protection circuit operates at a first voltage domain (e.g., 1.8V) while a second ESD protection circuit operates at a second voltage domain (e.g., 5V), allowing each circuit to be optimized for its specific voltage range and effectively handle high voltage spikes and noise appropriate to its domain.
Solution Approach 2:
The invention changes the operating voltage parameters by implementing multiple ESD protection circuits at different voltage domains. This allows the system to adapt to different voltage conditions and effectively protect against high voltage spikes and noise by having specialized protection at each voltage level rather than using a single protection mechanism.
2Adaptability or versatility
If a single voltage domain ESD protection circuit is used, then circuit simplicity is maintained, but protection across multiple voltage domains is insufficient
Solution Approach 1:
The ESD protection system is designed with multi-functionality to operate across multiple voltage domains. By implementing both a first ESD protection circuit at a first voltage domain and a second ESD protection circuit at a second voltage domain, the system achieves universal protection capability that can handle ESD events at different voltage levels, making it adaptable to various operating conditions.
Solution Approach 2:
The protection system is segmented into multiple independent ESD protection circuits, each dedicated to a specific voltage domain. This segmentation allows each circuit to be optimized for its voltage range while collectively providing comprehensive multi-voltage domain protection, balancing complexity with versatility.
Data Source
AI summary
The present disclosure provides a semiconductor device and an electrostatic discharge (ESD) clamp circuit. The semiconductor device includes a first resistance-capacitance (RC) timer circuit, a second RC timer circuit, a voltage pull-down circuit, a voltage pull-up circuit, a discharge circuit, and a discharge control circuit. The first RC timer circuit is coupled between a first power supply voltage and a reference voltage. The second RC timer circuit is coupled between a second power supply voltage and the reference voltage. The voltage pull-up circuit is coupled between the second power supply voltage and the reference voltage through a first resistor. The discharge circuit is coupled between the second power supply voltage and the reference voltage. The discharge control circuit is coupled between a third node and the reference voltage, and controls the discharge circuit using a first voltage generated by the first RC timer circuit.