Solid-State Devices TRIZ Cases

By combining strain sensors with touch electrodes, this case improves touch accuracy on deformable 3D display surfaces through elongation-capacitance feedback.

A voltage-divider cascode limits gate-source stress while enabling higher breakdown voltage with lower on-resistance in power transistors.

Segmented back gate protrusions contact each channel electrode through a 3D path, reducing cell interference and short-circuit risk.

A branched and twigged MIM capacitor layout raises capacitance in limited chip area while preserving dielectric isolation and heat dissipation.

Reflective layers and barrier walls redirect micro LED light toward the emitting side while preserving electrode routing and normal panel function.

Broadband light heats a light-absorbing layer to release bonded wafers quickly, avoiding laser alignment issues and device damage.

Combining narrowband fluoride and broadband red phosphors boosts absorption, blocks blue pass-through, and protects moisture-sensitive PC Red LEDs.

Vertical LED stack integration expands sub-pixel luminous area, shortens mounting time, and protects transparent electrodes during display assembly.

Separating the memory array chip from the control circuit chip enables bonded 3D stacking that cuts footprint and avoids process interference.

Encapsulation on a carrier body with early A/D conversion cuts moisture effects and thermomechanical stress in compact sensor measurement circuits.

A pre-formed conductive bonding layer on micro-LED chips improves mounting yield, connection reliability, and defective chip replacement.

Multiple interface channels let programmable fabric and configuration memory access a base die concurrently, boosting bandwidth and reconfiguration speed.

A flip-chip PIC redirects light through the substrate so electrical contacts stay shorter, reducing inductance and improving PCB frequency response.

An Nb2O5 or Ta2O5 interlayer blocks oxygen scavenging in HZO, stabilizing polarization states and improving endurance.

Batch transfer and electrode protrusions self-align RGB light-emitting nanorods, cutting process time and improving yield.

An outer cover layer shields OLED display signal links from damage while limiting RC delay to preserve high-resolution image quality.

A haze-controlled sealing member contacts the transparent LED substrate to cut reflection, improve light extraction, and maintain luminance uniformity.

Reflective, light-absorbing, and transmitting layers help small-pitch RGB LED arrays boost light output, contrast, and seamless panel splicing.

Visible heat- and IR-reactive tape reveals residual laser dicing energy, helping identify damaged microelectronic dies before assembly.

An interposer-based package layout redistributes fine-pitch I/O connections to raise pad density, reduce warpage, and avoid solder bridges.

A compensation layer and spaced division patterns around a display hole improve optical signal passage while preserving panel alignment.

Curved high- and low-resistance link lines balance signal resistance in stretchable displays to improve image uniformity and durability.

Multi-height pixel-defining films shield oxide transistors from emitted light while preserving brightness and light transmission in display areas.

A preformed separation region and controlled force or laser cracking split SiC wafers cleanly, improving material reuse and process reproducibility.

Angle-selective optical film and reflective sidewall structures cut light loss while protecting and positioning fine light emitting units.

Blue LED nanorods and a wavelength conversion layer replace RGB micro-LED integration to improve color purity, light efficiency, and cost.

Backside trench-to-via routing connects stacked FET source/drain regions with less lateral area, thermal damage, and contamination.

A thin protective coating plus a peel-off soft adhesive layer simplifies Mini/Micro LED repair while preserving ink color uniformity.

Symmetric through-substrate ID paths and on-chip decoding help dense 3D stacked chips route data accurately to the correct internal circuits.

Shielded pixel-defining films and graded transmitting regions block transistor light exposure while preserving display brightness and reliability.

A small resistor senses current and triggers a ground path, giving ICs TVS protection against overcurrent and overvoltage without parasitic dependence.

Optical cavities in a hybrid PIC-EIC package enable lower-power, higher-bandwidth data transfer between memory and compute.

Selective porosification of InGaN mesas relaxes stress to tune native RGB micro-LED wavelengths without pixel alignment issues.

Heating and pulling thermoplastic resin in multiple directions forms a protective sheet with accurate thickness and easier wafer release.

Stacked sub-pixel electrodes with sloping surfaces improve naked-eye 3D resolution, widen view angle, and reduce moire interference.

Readout circuits placed between TSVs in a 3D stacked image sensor shorten conductive paths, reducing RC delay and speeding signal settling.

Opposite layer stacking lets light-emitting elements assemble in two directions while preserving electrical connection, luminance, and yield.

Unequal red and blue pixel lighting areas improve color balance and white point accuracy while keeping the display structure manufacturable.

Horizontal trenches in strip LED packaging shorten thermal stress paths on gold wires, improving resistance to cold-hot cycling.

A TCO n-contact and dielectric-lined trench cut metal absorption while isolating neighboring LED pixels for higher light extraction and reliability.

Direct bonding, die thinning, and contact structures raise HBM density and bandwidth while easing stacked-memory manufacturing.

Coaxially stacked sub-pixels shrink panel size and simplify fabrication, improving yield while preserving full-color display output.

A low-pass filter on the transfer unit reference path suppresses waveform deterioration while keeping charge discharge and simplifying the circuit.

A nucleation-inhibiting coating and shadowed deposition region connect OLED electrodes without shadow masks, cutting IR drop and cost.

Corner and center electrode placement lets light emitting elements connect in multiple orientations, reducing contact failures during panel assembly.

Sequential downward motion of ejecting blocks separates chips from dicing tape with fewer vertical drives and simpler control.

Balanced light-shielding patterns and traces match transmittance across peripheral areas to reduce visible seams in spliced displays.

An isosceles trapezoid chip shape replaces plasma etching with straight cutting, improving yield and light-receiving area while lowering cost.