Trapezoidal Photosensitive Chip Layout for Straight-Cut Singulation
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Solution Overview
Problem
Conventional plasma etching processes for singulating photosensitive chips with 100 to 300 micrometer thicknesses are costly, time-consuming, and result in low yield rates, making them inefficient for producing photosensitive chips with polygonal shapes like hexagons.
Innovation Solution
The use of an isosceles trapezoid-shaped photosensitive chip design allows for traditional straight cutting processes, replacing plasma etching, and the integration of a conductive circuit board with trapezoidal photosensitive chips arranged to maximize light-receiving area and reduce production costs and time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If plasma etching process is used for singulating photosensitive chips with 100 to 300 micrometer thicknesses, then singulation can be achieved, but production cost increases, processing time extends, and yield rate decreases
Solution Approach 1:
The patent applies asymmetry by changing the chip shape from traditional symmetric hexagonal to asymmetric isosceles trapezoid. This asymmetric shape enables the use of conventional straight-line dicing blade methods instead of requiring complex plasma etching processes, thereby reducing production cost and time while maintaining singulation capability
Solution Approach 2:
The patent replaces the plasma etching process (chemical/physical system) with traditional mechanical dicing blade cutting methods. This substitution eliminates the need for expensive plasma equipment and processing, significantly reducing production cost and time while achieving effective chip singulation
2Ease of manufacture
If hexagonal photosensitive chips are arranged on conductive circuit board, then manufacturing can proceed with proper spacing, but area coverage is limited and light-receiving area is reduced
Solution Approach 1:
The isosceles trapezoid shape provides asymmetric geometry that allows tighter packing and better space utilization on the circuit board compared to hexagonal shapes. The parallel sides and specific angle ranges (50°-70°) enable more efficient area coverage while maintaining manufacturing feasibility
Solution Approach 2:
The patent optimizes the two-dimensional arrangement of chips on the circuit board by using trapezoidal shapes that better fill the available space. The specific dimensional relationships (height to short side ratio of 0.87-5.22 times) maximize the light-receiving area within the constrained board space
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The trapezoidal design enhances light-receiving area, reduces production costs and time, and improves yield, offering power-saving and design flexibility for smart wearable devices.
Implementation Method 1
When light is incident on the photosensitive chip, it can generate corresponding changes in current or voltage
Data Source
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AI summary
A photosensitive chip, a manufacturing method thereof, and a photosensitive module are provided. The photosensitive chip includes an isosceles trapezoid body, a positive electrode, and a negative electrode. The isosceles trapezoid body comprises an N-type semiconductor layer and a P-type semiconductor layer. The P-type semiconductor layer is disposed adjacent to the N-type semiconductor layer. The positive electrode is electrically connected to the P-type semiconductor layer, and the negative electrode is electrically connected to the N-type semiconductor layer.