Stacked HBM Die Bonding for Higher Density and Bandwidth

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Solution Overview

Problem

Existing semiconductor devices face challenges in achieving high memory density, bandwidth, and data transfer speed while maintaining efficient manufacturing processes and reducing costs.

Innovation Solution

The semiconductor device employs a stacked structure of multiple memory dice bonded together using direct bonding technology, with thinning and self-alignment techniques to enhance memory density and capacity, and utilizes contact structures for interconnection, enabling higher bandwidth and data transfer speed.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If multiple memory dice are stacked together to increase memory density, then memory density and capacity are improved, but device complexity and manufacturing difficulty increase

Engineering Contradiction:
Improvememory densityVSAvoiddevice complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent transitions from planar memory arrangement to three-dimensional stacking of multiple memory dice along the vertical direction. This dimensional change enables significant increases in memory density and capacity without expanding the chip footprint, as memory cells are organized across multiple stacked layers rather than a single plane.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The memory device is divided into multiple independent memory dice that are stacked and bonded together. Each memory die can be manufactured separately using standard processes, then combined through bonding layers. This segmentation allows for modular manufacturing and assembly, reducing the complexity of producing a single large high-density memory device.

Inventive Principle:
Principle #1Segmentation

2Productivity

If direct bonding technology is used to stack memory dice, then manufacturing efficiency is improved, but manufacturing precision requirements increase

Engineering Contradiction:
Improvemanufacturing efficiencyVSAvoidbonding precision
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

Bonding layers are formed on the memory dice before the stacking process. These pre-formed bonding layers facilitate alignment and bonding during assembly, reducing the precision requirements during the actual stacking operation. The preliminary preparation of bonding interfaces enables more tolerant and efficient manufacturing processes.

Inventive Principle:
Principle #10Preliminary action

3Speed

If contact structures are used for interconnection between stacked dice, then bandwidth and data transfer speed are improved, but device complexity increases

Engineering Contradiction:
Improvedata transfer speedVSAvoidinterconnection complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

Contact structures serve as intermediary elements that connect conductive layers between adjacent memory dice. These contact structures penetrate through bonding layers to establish electrical connections between stacked dice, enabling high-speed data transfer while maintaining modular device architecture. The contact structures act as mediators that facilitate inter-layer communication without requiring complex direct integrations.

Inventive Principle:
Principle #24Intermediary (Mediator)

4Quantity of substance

If memory dice are thinned to increase interconnection density, then bandwidth is improved, but manufacturing difficulty and reliability concerns increase

Engineering Contradiction:
Improveinterconnection densityVSAvoidmanufacturing difficulty
Core Design Contradiction:
Quantity of substanceVSEase of manufacture

Solution Approach 1:

The thickness of memory dice is reduced through thinning processes to increase the proportion of conductive layers relative to dielectric material. This parameter change enables higher interconnection density and improved bandwidth by reducing signal propagation delays. The thinning process transforms the physical dimensions of the memory dice to optimize electrical performance while managing manufacturing challenges.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20250275156A1High bandwidth memory systems and devices
Publication Date: 2025.08.28 YANGTZE MEMORY TECH CO LTD
  • US20250275156A1 patent drawing
  • US20250275156A1 patent drawing
  • US20250275156A1 patent drawing

AI summary

The present disclosure relates methods, devices, systems, and techniques for high bandwidth memory (HBM). An example semiconductor device includes a first layer, a second layer, a first die between the first layer and the second layer, and a second die stacked together along a first direction. Each of the first die and the second die has a conductive layer. The first die and the second die are bonded through the second layer. The semiconductor device further includes a first contact structure coupled to the conductive layer of the first die and a second contact structure coupled to the conductive layer of the second die. The first contact structure extends along the first direction and contacts the conductive layer of the first die without extending through the second layer.