3D NAND Back Gate Structure to Limit Cell Interference

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Solution Overview

Problem

Existing semiconductor devices face challenges in increasing data storage capacity and minimizing electric field interference between memory cells, while also preventing short circuits due to overlapping contacts.

Innovation Solution

The semiconductor device incorporates a back gate electrode that penetrates the channel structure, connected through a back gate line, with a protrusion portion contacting the back gate electrode to reduce electric field interference and prevent short circuits by avoiding overlap with bit line contacts.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If memory cells are arranged three-dimensionally to increase data storage capacity, then storage capacity increases, but electric field interference between neighboring cells increases

Engineering Contradiction:
Improvedata storage capacityVSAvoidelectric field interference
Core Design Contradiction:
Quantity of substanceVSObject-affected harmful factors

Solution Approach 1:

The back gate structure is divided into multiple protrusion portions that penetrate through side surfaces of different channel structures. Each protrusion portion independently contacts the back gate electrode of a specific channel structure, allowing localized electric field control for each memory cell string without interfering with neighboring cells. This segmentation enables individualized back gate voltage application, reducing cross-cell electric field interference while maintaining high storage capacity through 3D arrangement.

Inventive Principle:
Principle #1Segmentation

2Reliability

If back gate contact is positioned to connect with back gate electrode, then electrical connection is established, but short circuit risk increases due to potential overlap with bit line contact

Engineering Contradiction:
Improveelectrical connection reliabilityVSAvoidshort circuit risk
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The back gate contact connects to the back gate electrode through a three-dimensional path involving protrusion portions that extend horizontally from the back gate structure to penetrate side surfaces of channel structures. This 3D connection route avoids planar overlap with bit line contacts, eliminating short circuit risks while ensuring reliable electrical connection. The protrusion portions create a spatially separated connection path that maintains electrical reliability without compromising device safety.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Reliability

If protrusion portion penetrates through side surface of channel structure, then contact with back gate electrode is achieved, but manufacturing precision requirements increase

Engineering Contradiction:
Improvecontact reliabilityVSAvoidpenetration precision
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The protrusion portions are formed as pre-defined structural extensions of the back gate structure before final device assembly. By pre-forming these protrusion portions with predetermined shapes and positions during the manufacturing process, the patent eliminates the need for precise post-assembly alignment. The protrusion portions naturally guide themselves to contact the back gate electrodes during device formation, significantly reducing manufacturing precision requirements while ensuring reliable electrical contact.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design enhances data storage capacity by minimizing electric field effects on neighboring cells and reduces the risk of short circuits, thereby improving the reliability and efficiency of the semiconductor device.

Implementation Method 1

a back gate electrode penetrating through the stack structure and the source structure in the first direction... to reduce electric field interference

Methodology Applied
Scientific EffectElectric field: Electric Field

Data Source

PatentUS20250287591A1Semiconductor device and data storage system including the same
Publication Date: 2025.09.11 SAMSUNG ELECTRONICS CO LTD
  • US20250287591A1 patent drawing
  • US20250287591A1 patent drawing
  • US20250287591A1 patent drawing

AI summary

A semiconductor device includes a source structure, a stack structure including interlayer insulating layers and gate electrodes stacked in a first direction, the first direction being perpendicular to an upper surface of the source structure, a channel structure including a back gate electrode penetrating through the stack structure and the source structure in the first direction, a channel layer between the back gate electrode and the gate electrodes, and a gate dielectric structure between the channel layer and the gate electrodes, and a back gate structure on the stack structure and electrically connected to the back gate electrode, wherein the back gate structure includes a protrusion portion penetrating through a side surface of the channel structure and contacting the back gate electrode.