Signal Link Cover Structure for OLED Display RC Delay Control
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Solution Overview
Problem
The increase in load on signal lines and electrodes in high-definition and high-resolution organic light emitting diode displays leads to significant RC delay, affecting image quality and driving characteristics.
Innovation Solution
A display device design featuring a substrate with thin film transistors, planarization layers, signal links covered by an outer cover layer, and additional protective structures to minimize RC delay and protect signal links from damage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If high definition and high resolution are implemented, then image quality is improved, but RC delay increases and signal transmission becomes difficult
Solution Approach 1:
The patent introduces a three-dimensional structure by forming an outer cover layer that overlaps the side surface of the signal link, transitioning from a traditional planar protective layer to a multi-dimensional protective structure. This spatial arrangement provides enhanced protection without increasing lateral dimensions that would affect RC delay
Solution Approach 2:
The outer cover layer is formed as a thin film structure that covers the signal link, providing protection while maintaining signal transmission characteristics. The thin film nature allows it to protect the signal link without adding significant capacitance or resistance
2Ease of operation
If signal links are exposed for connection, then ease of connection is improved, but vulnerability to damage increases
Solution Approach 1:
The outer cover layer is formed in advance to cover and protect the signal link before any potential damage can occur. This preemptive protective structure shields the signal link from mechanical damage, chemical contamination, and other environmental factors throughout the device fabrication and operation processes
Solution Approach 2:
The outer cover layer acts as an intermediary protective element between the signal link and the external environment. It provides a barrier that protects the signal link while allowing electrical connections to be made through designated openings or contact points
Data Source
AI summary
Disclosed is a display device. The display device includes a substrate having an active area and a non-active area, a thin film transistor arranged on the active area of the substrate, at least two planarization layers arranged on the thin film transistor, signal links arranged on the non-active area of the substrate, and an outer cover layer spaced apart from the at least two planarization layers and configured to overlap upper and side surfaces of the signal links, thus preventing or reducing damage to the signal links.