Multichannel Memory Arbitration for Balanced Request Interleaving

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Solution Overview

Problem

Existing multi-core systems face bottlenecks in memory access due to uneven distribution of load across memory channels and modules, leading to delays and inefficiencies in data throughput.

Innovation Solution

A memory controller with input ports, channel queues, arbitration circuits, and an interleave circuit that dynamically selects arbitration algorithms to optimize memory access by distributing requests across multiple channels, using a combination of round-robin and credit-based arbitration to prioritize memory transactions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If memory access requests are handled using traditional single-algorithm arbitration, then the arbitration mechanism is simple, but memory access efficiency is low and latency is high due to uneven load distribution

Engineering Contradiction:
Improvememory access efficiencyVSAvoidarbitration mechanism complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The arbitration mechanism dynamically switches between multiple arbitration algorithms (round-robin, credit-based, priority-based) based on real-time system conditions and memory channel load states. This dynamic adaptation allows the system to optimize memory access efficiency by selecting the most appropriate algorithm for current workload patterns, resolving the contradiction between simplicity and performance.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes arbitration parameters and algorithm selection based on monitored system states such as memory channel utilization, request types, and queue depths. By adjusting these parameters dynamically, the system achieves higher productivity without being locked into a single fixed arbitration strategy, thus resolving the efficiency-simplicity tradeoff.

Inventive Principle:
Principle #35Parameter changes

2Productivity

If load is distributed across multiple memory channels, then data throughput increases, but arbitration complexity increases due to managing multiple queues and algorithms

Engineering Contradiction:
Improvedata throughputVSAvoidarbitration management complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The arbitration system segments memory access management into independent per-channel arbitration units, each with its own queue and arbitration logic. This segmentation allows parallel processing of arbitration decisions across multiple channels, increasing data throughput while managing complexity through modular, independent units rather than a monolithic complex system.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system implements feedback mechanisms that monitor channel load states and adjust arbitration decisions accordingly. By continuously monitoring and adapting to real-time conditions, the system optimizes throughput while using intelligent feedback loops to manage the complexity of coordinating multiple channels, automatically balancing the tradeoff between performance and management overhead.

Inventive Principle:
Principle #23Feedback

3Loss of time

If priority-based arbitration is used for high-priority requests, then response time for critical operations improves, but fairness and load balancing across channels deteriorates

Engineering Contradiction:
Improverequest response timeVSAvoidload distribution fairness
Core Design Contradiction:
Loss of timeVSStability of the object's composition

Solution Approach 1:

The arbitration system dynamically adjusts priority levels and algorithm selection based on real-time channel load states. When a channel is lightly loaded, priority-based arbitration can respond quickly to high-priority requests. When channels are heavily loaded, the system switches to more fair scheduling algorithms to maintain load balancing. This dynamic behavior resolves the contradiction between fast response and fair distribution.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes arbitration parameters including priority weights, queue selection criteria, and algorithm choice based on monitored system conditions. By adjusting these parameters dynamically, the system can optimize for low latency when needed while maintaining fairness during high-utilization periods, thus resolving the time-loss versus fairness contradiction.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20250298755A1Multichannel memory arbitration and interleaving scheme
Publication Date: 2025.09.25 TEXAS INSTRUMENTS INC
  • US20250298755A1 patent drawing
  • US20250298755A1 patent drawing
  • US20250298755A1 patent drawing

AI summary

Arbitration and interleaving are performed with respect to requests received through input ports, from respective requestors. An example controller is caused to determine, for each request, a pathway to a channel, among a set of channels. Such determination includes to: place each request in a channel queue of a set of channel queues associated with the requestor from which the request was received, the channel queue in which the request is placed being associated with a specific channel of the set of channels; for each request for presentation to an interface, select an arbitration algorithm among multiple arbitration algorithms to determine which channel queues participate in a first arbitration, and obtain the request from a participating channel queue; and present each request obtained through the first arbitration to an interface coupled to the set of channels for participation in a second arbitration.