Multi-Chip Semiconductor Package With Variable Adhesive Film Thickness
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Solution Overview
Problem
Existing semiconductor packages face challenges in efficiently integrating different types of semiconductor chips due to stress and deformation caused by material differences, leading to voids and cracks during manufacturing and assembly, which affect reliability and productivity.
Innovation Solution
The semiconductor package design includes varying thicknesses and adhesive film configurations for different semiconductor chips to minimize stress and void formation, utilizing adhesive films with tailored thicknesses and arrangements to stabilize chip positions and reduce deformation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If different types of semiconductor chips are integrated in a limited package structure, then the data processing capacity and integration level are improved, but the stress and defects caused by material differences and temperature changes worsen
Solution Approach 1:
The patent applies local quality by varying the adhesive film thickness according to the specific requirements of different chip types and their positions within the package. Thicker adhesive films are used for chips experiencing greater thermal stress or positioned in high-stress areas, while thinner films are used where minimal stress is expected. This localized adaptation of adhesive properties resolves the contradiction by maintaining reliability through appropriate stress management while preserving high integration capacity.
Solution Approach 2:
The patent implements parameter changes by adjusting the adhesive film thickness as a critical parameter to manage the effects of material differences and temperature changes. By optimizing this parameter, the package can accommodate multiple chip types with different thermal and mechanical properties, thereby maintaining both high integration productivity and reliability under varying operating conditions.
2Reliability
If adhesive film thickness is varied to increase adhesive areas, then the attachment stability and defect reduction are improved, but the manufacturing complexity worsens
Solution Approach 1:
The patent applies local quality by implementing spatially varying adhesive film thicknesses tailored to specific chip positions and types within the package. This approach improves attachment stability in critical areas while managing stress distribution, and the complexity is contained to the adhesive application process rather than affecting the entire manufacturing system.
Solution Approach 2:
The patent employs preliminary action by pre-configuring adhesive films with varying thicknesses before chip mounting. This advance preparation of adhesive structures with optimized thickness profiles reduces defects and improves attachment stability, while the manufacturing complexity is managed through automated adhesive application processes that can efficiently handle the varied thickness requirements.
3Productivity
If multiple semiconductor chips with different thicknesses are mounted on the package substrate, then the integration efficiency and space utilization are improved, but the warpage and cracking issues worsen
Solution Approach 1:
The patent applies local quality by matching adhesive film thickness to the specific characteristics of each chip type and its position in the package. This localized adaptation compensates for the varying thicknesses of different chips, distributing stress evenly across the package structure and preventing warpage and cracking while maintaining high integration efficiency.
Solution Approach 2:
The patent implements beforehand cushioning by using appropriately thickened adhesive films as cushioning layers between chips of different thicknesses and the package substrate. This preventive measure absorbs thermal and mechanical stress before it can cause warpage or cracking, allowing efficient integration of multiple chip types without compromising structural integrity.
Data Source
AI summary
A semiconductor package is provided. The semiconductor package includes: a package substrate; a first semiconductor chip mounted on the package substrate; a second semiconductor chip mounted on the package substrate; an adhesive film provided on an upper surface the first semiconductor chip and an upper surface of the second semiconductor chip; and a third semiconductor chip attached to the first semiconductor chip, the second semiconductor chip by the adhesive film. The first and second semiconductor chips have different heights, and a thickness of the adhesive film at a portion thereof contacting the first semiconductor chip is different from a thickness of the adhesive film at a portion thereof contacting the second semiconductor chip.