Multi-Chip Package Wiring Test Circuit for Open-Short Detection
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Solution Overview
Problem
Existing semiconductor devices face challenges in detecting the connection state of internal wiring within a multi-chip package without increasing the circuit area, as conventional methods like X-ray inspection are inadequate for determining electrical openness or short-circuiting, and operational tests struggle to differentiate between chip and wiring defects.
Innovation Solution
A semiconductor device configuration that includes a first and second semiconductor chip with specific pads and a control circuit, where a switch and power supply circuit on the second chip allow for connection detection tests of internal wiring by controlling current flow and voltage measurement between power supply and ground pads, enabling detection without requiring additional circuit area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a circuit for executing connection detection is provided in a semiconductor chip inside the package, then connection detection of internal wiring can be executed, but the required circuit area (die size) of the semiconductor chip increases
Solution Approach 1:
A dedicated test chip is introduced as an intermediary component that contains the connection detection circuit. This test chip is mounted alongside the functional semiconductor chips in the multi-chip package, allowing connection detection of internal wiring without increasing the circuit area of the functional chips. The test chip serves as a separate mediator that handles the detection function while the functional chips maintain their original design constraints.
2Ease of operation
If X-ray inspection is used to detect internal wiring connection state, then non-contact detection is possible, but it cannot determine electrical openness or short-circuiting
Solution Approach 1:
The test chip contains a test circuit that actively applies test signals through the internal wiring and measures the electrical response. This self-service approach allows the system to perform electrical characterization (detecting opens, shorts, and resistance values) using built-in circuitry rather than external inspection methods. The test circuit generates and analyzes electrical signals to determine the connection state with high precision.
3Reliability
If operational tests are conducted to detect wiring defects, then electrical functionality can be verified, but it is difficult to differentiate between chip and wiring defects
Solution Approach 1:
The test chip is designed with segmented test circuits that can independently test specific wiring paths and connections. By dividing the testing function into separate, dedicated circuit blocks on the test chip, the system can isolate and identify whether defects originate from specific chips or from the internal wiring connecting them. Each test circuit segment corresponds to specific wiring paths, enabling precise defect localization.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables reliable detection of internal wiring connection states without increasing circuit area, allowing for accurate identification of open or short-circuit defects within the semiconductor package, thereby improving diagnostic capabilities.
Implementation Method 1
A switch is on the second semiconductor chip between the second pad and the power supply circuit to connect or disconnect the second pad from the power supply circuit
Implementation Method 2
A power supply circuit on the second semiconductor chip is configured to supply a current to the second pad
Implementation Method 3
A control circuit is on the second semiconductor chip configured to output a first control signal for controlling ON and OFF states of the switch in response to a test signal supplied to the third pad
Data Source
AI summary
A semiconductor device includes first and second chips in a package. A first pad is on the first chip and electrically connected to a node between a power supply pad and a ground pad on the first chip. Second and third pads are on the second chip. An internal wiring connects the first pad to the second pad within the package. A power circuit on the semiconductor chip configured to supply a current to the second pad. A switch is on the second chip between the second pad and the power supply circuit to connect or disconnect the second pad from the power circuit. A control circuit is on the second chip and configured to output a first signal for the switch in response to a test signal supplied to the third pad and a second signal to the power circuit to cause the power circuit to output current.