Multicore 3-D Graphics Memory Management for Ordered Rendering

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Solution Overview

Problem

Implementing rendering tasks in parallel on a multicore GPU while maintaining the order of primitives as provided by the application driver and managing memory efficiently to facilitate the rendering of complex scenes.

Innovation Solution

A multicore graphics rendering system with a hierarchical memory management system that uses allocation lists (ALIST) and virtualised memory spaces to manage memory allocation and ordering of rendering tasks, ensuring efficient use of memory and maintaining the correct rendering order.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If rendering tasks are processed in parallel on a multicore GPU, then rendering speed is improved, but maintaining the correct order of primitives becomes difficult

Engineering Contradiction:
Improverendering speedVSAvoidordering correctness
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent segments the rendering pipeline into distinct stages (geometry processing, tile sorting, fragment processing) that can be executed in parallel across multiple cores. Each core processes independent segments while the allocation list maintains global ordering information, allowing parallel execution without compromising the correct sequence of primitive rendering.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The allocation list serves as an intermediary data structure that coordinates between parallel geometry processing cores and fragment processing cores. It stores mapping information between primitive groups and memory locations, enabling cores to retrieve data in the correct rendering order even when processing occurs in parallel, thus maintaining ordering correctness while achieving speedup.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Adaptability or versatility

If memory is allocated for complex scenes with many primitives, then rendering capability is improved, but memory overflow becomes more likely

Engineering Contradiction:
Improverendering capabilityVSAvoidmemory usage
Core Design Contradiction:
Adaptability or versatilityVSQuantity of substance

Solution Approach 1:

The patent implements dynamic memory allocation where the allocation list is updated continuously as primitives are processed and rendered. Memory is allocated on-demand for specific primitive groups rather than pre-allocating for entire complex scenes, allowing the system to handle large scenes by managing memory in smaller, manageable chunks that are freed after use.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system recovers and reuses memory by discarding allocation information for primitive groups that have already been rendered. The allocation list is updated to reflect completed rendering, allowing previously allocated memory to be reallocated for new primitive groups, thus enabling the rendering of complex scenes without proportionally increasing peak memory usage.

Inventive Principle:
Principle #34Discarding and recovering

3Ease of manufacture

If tile-based deferred rendering is used, then data locality is improved, but memory management complexity increases

Engineering Contradiction:
Improvedata localityVSAvoidmemory management complexity
Core Design Contradiction:
Ease of manufactureVSDevice complexity

Solution Approach 1:

The patent applies segmentation by dividing the scene into tile-based regions and organizing the allocation list to reflect this spatial segmentation. Each tile's primitive data is stored in contiguous memory locations, improving data locality for fragment processing. The allocation list maintains mappings that respect this spatial organization, allowing efficient memory access while managing complexity through structured organization.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS12450684B2Memory management for multicore 3-D graphics rendering
Publication Date: 2025.10.21 IMAGINATION TECH LTD
  • US12450684B2 patent drawing
  • US12450684B2 patent drawing
  • US12450684B2 patent drawing

AI summary

A multicore graphics rendering system includes a plurality of cores configured to implement tile-based rendering of a stream of primitives. First cores are configured to process groups of primitives, to produce transformed geometry data. The graphics rendering system uses at least one virtualised memory space. At least one virtualised memory space is segmented such that the first cores are allocated respective non-overlapping virtual address ranges in the space, the virtual address ranges being associated with different entries in a top level of the index. The top level of the hierarchical index is pre-allocated, and each core is primed by providing it with said top level of the hierarchical index.