Multi-Gate Fin Structure With Early Cladding Removal
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Solution Overview
Problem
Current methods for fabricating multi-gate devices with dielectric fins and sacrificial cladding layers face challenges such as etching depth limitations, non-uniformity, and cleaning complexity, which affect the performance and reliability of the resulting devices.
Innovation Solution
The method involves forming semiconductor fins, depositing dielectric fins, and using a sacrificial cladding layer with amorphous or polycrystalline semiconductor material to reserve space for metal gate stacks, followed by the removal of the sacrificial cladding layer before dummy gate structure formation, which reduces leakage current and maintains inner spacer length uniformity, and simplifies the cleaning process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If sacrificial cladding layers are introduced to fill between semiconductor fins and dielectric fins, then space for metal gate stacks is reserved, but etching depth limitations occur during forming S/D recesses
Solution Approach 1:
The patent removes the sacrificial cladding layer before forming the S/D recesses, which eliminates the etching depth limitations that would otherwise occur. This preliminary removal action allows subsequent etching to proceed to the required depth without being constrained by the presence of the cladding layer, while the space for metal gate stacks has already been established by the earlier formation of dielectric fins.
2Volume of moving object
If sacrificial cladding layers are introduced to fill between semiconductor fins and dielectric fins, then space for metal gate stacks is reserved, but non-uniformity occurs during inner spacer formation
Solution Approach 1:
The sacrificial cladding layer is removed before inner spacer formation, eliminating the source of non-uniformity. This preliminary removal ensures that the inner spacers can be formed with consistent dimensions and uniformity, while the space reservation for metal gate stacks was already accomplished during the earlier dielectric fin formation stage.
3Volume of moving object
If sacrificial cladding layers are introduced to fill between semiconductor fins and dielectric fins, then space for metal gate stacks is reserved, but cleaning complexity increases during channel layer release
Solution Approach 1:
The sacrificial cladding layer is removed before channel layer release, which simplifies the cleaning process. By performing this removal in advance, the channel layer release step no longer needs to deal with the complexity of removing cladding material, reducing the overall cleaning complexity while the space for metal gate stacks was already established earlier.
4Manufacturing precision
If dielectric fins are introduced to improve uniformity of fins, then fin uniformity is improved, but device structure complexity increases
Solution Approach 1:
The patent extracts or removes the sacrificial cladding layer after it has served its purpose of defining space for metal gate stacks. This removal eliminates the complexity associated with having additional material layers in the final device structure, while the fin uniformity benefits from the dielectric fins remain intact.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces substrate leakage current, enhances inner spacer uniformity, and simplifies the channel layer release process, improving the overall performance and reliability of multi-gate devices.
Implementation Method 1
depositing a cladding layer on sidewalls of the semiconductor fin
Implementation Method 2
removal of the sacrificial cladding layer before dummy gate structure formation
Data Source
AI summary
A method includes forming a semiconductor fin protruding from a substrate, forming a cladding layer on sidewalls of the semiconductor fin, forming first and second dielectric fins sandwiching the semiconductor fin, and removing the cladding layer. The removal of the cladding layer forms trenches between the semiconductor fin and the first and second dielectric fins. After the removing of the cladding layer, a dummy gate structure is formed over the semiconductor fin and in the trenches. The method also includes recessing the semiconductor fin in a region proximal to the dummy gate structure, forming an epitaxial feature on the recessed semiconductor fin, and forming a metal gate stack replacing the dummy gate structure. A top surface of the recessed semiconductor fin in the region has a concave shape.