Multi-Gate Devices with Varying Fin Heights for Drive Current Optimization
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Solution Overview
Problem
Multi-gate semiconductor devices face challenges in achieving optimal drive current and leakage current performance due to uniformity constraints in integrated circuits, which can compromise their application-specific characteristics, and manufacturing difficulties arise from varying fin heights on semiconductor substrates.
Innovation Solution
The implementation of multi-gate devices with differing effective gate widths by adjusting the height of channel region fins, allowing for tailored drive current and leakage current performance without the need for complex photolithography on substrates with varying heights, achieved through methods like epitaxial growth and local oxidation of silicon.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If all multi-gate devices in an integrated circuit are given the same dimensions for ease of fabrication and uniformity, then manufacturing simplicity is improved, but the ability to optimize for specific applications (high drive current or low leakage current) deteriorates
Solution Approach 1:
The patent applies local quality by giving different fin heights to different multi-gate devices within the same integrated circuit. Specifically, first multi-gate devices have a first fin height optimized for high drive current applications, while second multi-gate devices have a second fin height optimized for low leakage current applications. This allows each device type to be locally optimized for its specific function while using a unified fabrication process that deposits a single thickness of epitaxial material.
2Adaptability or versatility
If multi-gate devices are designed with different dimensions to optimize for high drive current or low leakage current, then application-specific performance is improved, but manufacturing complexity increases due to varying fin heights
Solution Approach 1:
The patent uses parameter changes by varying the fin height dimension to achieve different device characteristics. First multi-gate devices have fins extending to a first depth from the substrate surface, while second multi-gate devices have fins extending to a second depth. This single parameter change (fin height) enables optimization for both high drive current and low leakage current applications without requiring complex multi-step fabrication processes.
3Manufacturing precision
If photolithography is performed on substrates with varying fin heights, then different effective gate widths can be achieved, but depth-of-focus problems arise
Solution Approach 1:
The patent applies preliminary action by pre-forming isolation structures (such as mandrels or dummy fins) at the desired fin height before depositing the epitaxial material. These preliminary structures serve as templates that define the final fin height after epitaxial growth and subsequent removal of the preliminary structures. This approach allows all fins to be formed at the same height during a single epitaxial deposition step, avoiding depth-of-focus problems in photolithography while still achieving different effective gate widths through selective fin removal or merging.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables improved operating characteristics for specific applications by increasing drive current and reducing leakage current, while simplifying manufacturing by avoiding depth-of-focus issues in photolithography, thus enhancing the versatility and performance of multi-gate devices in integrated circuits.
Implementation Method 1
achieved through methods like epitaxial growth
Implementation Method 2
achieved through methods like epitaxial growth and local oxidation of silicon
Data Source
AI summary
A semiconductor device comprises a first multi-gate device and a second multi-gate device on a semiconductor substrate. The first multi-gate device comprises a first gate structure and the second multi-gate device comprises a second gate structure. An effective width of the first gate structure is greater than an effective width of the second gate structure.


