Multi-Gate GaN Transistor for High-Voltage RF Switches
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Solution Overview
Problem
Current silicon on insulator (Si RF SOI) and gallium arsenide (GaAs) pseudomorphic High Electron Mobility Transistors (pHEMT) used in radio frequency switches have high on-resistance and large parasitics, which are detrimental to performance and power efficiency, especially when handling high breakdown voltages.
Innovation Solution
A multi-gate gallium nitride (GaN) transistor architecture is employed, utilizing a 2D electron gas channel to achieve lower on-resistance by distributing the high gate voltage across multiple gates, thereby reducing contact resistance and enabling efficient operation with limited supply voltages found in mobile systems.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If multiple transistors are stacked in series to handle high breakdown voltage, then voltage handling capability is improved, but on-resistance increases
Solution Approach 1:
The patent divides the single high-voltage transistor into multiple lower-voltage transistor stages connected in series. Each stage handles a portion of the total voltage, reducing the voltage burden on each individual transistor while maintaining overall high-voltage capability. This segmentation allows each transistor to operate at lower voltage stress, thereby reducing on-resistance compared to using a single high-voltage transistor.
2Reliability
If large transistor width is used to reduce on-resistance, then on-resistance is improved, but parasitic capacitance increases
Solution Approach 1:
The patent segments the total current path into multiple parallel transistor channels. Each transistor operates at a moderate width, avoiding the excessive parasitic capacitance of a single wide transistor, while the combined parallel channels achieve the low total on-resistance needed for high-performance RF switching.
3Ease of operation
If high gate voltage is applied to keep channel off-state, then switching control is improved, but power consumption increases
Solution Approach 1:
The patent divides the total gate voltage requirement across multiple transistor gates in series. Each gate operates at a lower voltage level, reducing the total power consumption while maintaining effective switching control through the stacked configuration.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The multi-gate GaN transistor design significantly reduces on-resistance compared to Si RF SOI and GaAs transistors, improving performance and power efficiency while accommodating the limited supply voltages in mobile systems.
Implementation Method 1
utilizing a 2D electron gas channel to achieve lower on-resistance
Implementation Method 2
a polarization layer located between the first gate electrode and the second gate electrode
Data Source
AI summary
Embodiments of this disclosure are directed to a multi-gate gallium nitride (GaN) transistor and methods of making the same. The multi-gate GaN transistor includes a gallium nitride layer. The GaN transistor includes two or more gate electrodes between a drain electrode and a source electrode. A polarization layer is located between the first gate electrode and the second gate electrode, the polarization layer forming a two dimensional electron gas (2DEG) within the GaN layer, the 2DEG electrically coupling the first gate electrode and the second gate electrode.