Multi-Gate Tunneling FET for Low-Power Integration

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Solution Overview

Problem

Semiconductor devices face increased power consumption with higher integration density, and tunneling field-effect transistors (TFETs) have varying output currents due to minute voltage changes, necessitating a low-power solution.

Innovation Solution

A low-power TFET with multiple gates is designed, featuring an intrinsic semiconductor region, source, and drain regions with p-type dopants, where gate electrodes induce a tunneling field effect, allowing current to flow in both directions, with gate spacers for insulation and a buried insulating layer to reduce leakage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If integration density of semiconductor devices is increased, then productivity is improved, but power consumption increases

Engineering Contradiction:
Improveintegration densityVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The semiconductor device is divided into multiple independent gate regions (first gate electrode over source region, second gate electrode over drain region, third gate electrode over channel region) that can be independently controlled. This segmentation allows selective activation of device regions, enabling low-power operation by activating only necessary regions while maintaining high integration density through compact arrangement of multiple gates.

Inventive Principle:
Principle #1Segmentation

2Use of energy by moving object

If TFET operates at low voltage, then power consumption is reduced, but output current varies significantly due to minute voltage changes

Engineering Contradiction:
Improvepower consumptionVSAvoidoutput current stability
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The device employs multiple gate electrodes that can be dynamically controlled with different voltages to stabilize output current. The first gate electrode controls carrier injection from source, the second gate electrode controls carrier extraction at drain, and the third gate electrode controls channel conductivity. By dynamically adjusting the voltage on each gate, the device maintains stable output current despite operating at low voltages, thus reducing power consumption while ensuring reliability.

Inventive Principle:
Principle #15Dynamics

3Adaptability or versatility

If multiple gate electrodes are added to enable bidirectional current flow, then adaptability is improved, but device complexity increases

Engineering Contradiction:
Improvebidirectional current flow capabilityVSAvoidnumber of gate electrodes
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The multiple gate electrodes serve multiple functions simultaneously: the first gate electrode controls source region carrier injection, the second gate electrode controls drain region carrier extraction, and the third gate electrode controls channel conductivity. This multi-functionality enables bidirectional current flow capability while managing device complexity through efficient utilization of each gate electrode for multiple operational requirements.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The TFET operates efficiently with low driving voltages, consuming less power and exhibiting high energy efficiency, with bidirectional current flow and rapid on/off switching capabilities.

Implementation Method 1

When an external voltage is applied to the drain gate electrode, the drain gate electrode may induce a tunneling field effect between the source region and the intrinsic semiconductor region

Methodology Applied
Scientific EffectTunneling field effect: Franz-Keldysh Effect

Data Source

PatentUS9425297B2Semiconductor devices
Publication Date: 2016.08.23 SAMSUNG ELECTRONICS CO LTD
  • US9425297B2 patent drawing
  • US9425297B2 patent drawing
  • US9425297B2 patent drawing

AI summary

Semiconductor devices include an intrinsic semiconductor region on a substrate, a source region adjacent to a first side surface of the semiconductor region and doped with a p-type dopant, a drain region adjacent to a second side surface of the semiconductor region, a gate electrode on the semiconductor region, a source gate electrode on the source region, and a drain gate electrode on the drain region. The second side surface is a reverse side of the first side surface. The drain region is doped with a p-type dopant.