Solid-State Devices TRIZ Cases

An integral diode limits backward leakage currents in nanowire crossbar arrays, enabling accurate reading of resistive states for high-density memory.

Hydrophilic and hydrophobic bank openings control organic material deposition to resolve thickness uniformity issues in solution-processed displays.

A solid-state imaging device uses a locally thin substrate region to reduce dielectric constant and increase potential barriers between pixels.

Annealing tungsten films removes fluorine impurities, preventing void formation at the interface with silicon oxide layers.

Exposed lead frame legs extend outside the package body to create additional thermal pathways for side view LED packages.

Vertical stacking of main and auxiliary light-emitting layers overcomes fine metal mask constraints to boost pixel density.

A carbon nanotube structure forms a Schottky diode unit on an insulating substrate with photolithography electrodes.

A compensation electrode connects to a sub-zone common electrode via a vertical through-hole in an array substrate design.

A conductive layer contacts pad electrodes through a planarization contact hole to enable touch sensing.

A nonvolatile resistance change element integrates a metal electrode, semiconductor counterelectrode, and resistance layer containing a conductive filament.

Amorphous silicon joining members connect stacked semiconductor layers while maintaining etching selection ratios to suppress connection resistance variations.

A DRAM-based reconfigurable look-up table enables dynamic logic function changes using standard memory operations.

Aluminum oxide buffer layer prevents plasma damage during cathode formation while enhancing charge generation efficiency.

Sacrificial replacement layer methods create side walls that isolate photodiodes, reducing charge spreading and improving occupancy density in image sensors.

A condensed polycyclic compound serves as a TADF dopant in the emission layer of an organic electroluminescence device.

Hybrid bonding connects LED wafers to CMOS ICs, avoiding vias and maintaining bottom contact size to resolve efficiency loss at small pixel pitches.

Sidewall conductive connecting structures on LED units minimize light shading from opaque electrodes, boosting extraction efficiency.

Integrating lenses with pixel areas prevents non-light emission viewing artifacts while compressing optical module depth.

Segmented inorganic particles within organic layers resolve the contradiction between durability and flexibility while maintaining barrier properties.

Segmented charge trap patterns with blocking dielectric layers prevent charge diffusion between adjacent cells in high-density vertical memory stacks.

Varying light blocking aperture ratios across the display panel minimize external reflection without circular polarizers, maintaining high resolution.

A sensing apparatus uses a hetero-junction device and optical light coupler to transform current signals into voltage signals.

Pre-formed grooves in the package body confine wavelength conversion resin, eliminating the bull's eye effect and improving luminous efficiency.

A hole transport layer incorporates an ionic compound with a Spiro-OMeTAD cation and TFSI anion to boost photoelectric conversion efficiency.

Transparent conductive oxide plating enhancement layer reduces electrical resistance to prevent damascene opening pinching during copper seed deposition.

Segmented gate electrodes control carrier flow in a tunneling field-effect transistor, reducing power consumption while stabilizing output current.

Hard mask planarization reduces pattern size dispersion and manufacturing costs for 3D memory integration.

A semiconductor device uses a selector and step-up circuit to generate drive and internal voltages.

Confining perovskite precursor solution in a concave mold eliminates vacuum processing while ensuring submicrometer crystal uniformity.

Segmented gate electrodes prevent ion penetration in memory areas while enabling fine patterning in logic circuits.

Multi-step imprint lithography using a stitched master template creates large-area wire grid polarizers while minimizing boundary defects.

Forming SiC crystalline regions on silicon substrates enables direct integration of GaN-based devices with CMOS circuits.

A protective layer shields inorganic insulating layers during dry etching to preserve surface integrity.

Input sensing part overlaps pixel defining film second opening to reduce parasitic capacitance and improve touch sensitivity.

A 3D Hall sensor with a sloped sidewall well detects in-plane magnetic fields, overcoming low sensitivity limits of planar designs.

Segmenting the drain electrode into upper and lower conductive layers improves etching quality while expanding the effective light transmitting area.

Ion implantation creates deep doped regions beneath isolation features, reducing crosstalk while maintaining sensor resolution and dark current performance.

A nitride semiconductor light emitting element uses an n-side anti-reflection layer and a p-side Bragg reflection layer to manage optical paths.

Selector regions segment sub-bit lines into groups, reducing resistance and improving signal margins without increasing device complexity.

Segmented temperature growth and eutectic alloy bonding reduce leakage current from lattice mismatch defects in silicon germanium photodetectors.

A monochrome light emitting display device uses first and second sub-pixels with different aperture ratios to enhance contrast and resolution.

Asymmetric transfer gate electrode extends beyond isolation region to enhance charge transfer efficiency in photoelectric conversion devices.

A wide contact structure electrically connects source and drain regions in an image sensor substrate.

Segmented holding members prevent gravitational desiccant movement, ensuring uniform moisture protection and structural integrity.

Multi-mask patterning creates variable select gate widths in flash memory devices.

Benzotriazole adhesion members neutralize acidic gases penetrating packaging to prevent metal corrosion and maintain luminous intensity.

Engineered rare-earth compound substrates enable heteroepitaxy of distinct crystal orientations on silicon surfaces.