Rare-Earth Substrate Heteroepitaxy for Carrier Mobility
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Solution Overview
Problem
The challenge in semiconductor technology is to optimize crystal lattice orientation for improved carrier mobility and reduced leakage currents in MOSFET devices, particularly at the sub-100 nm gate length regime, where conventional scaling methods fail to enhance performance while minimizing power consumption.
Innovation Solution
The use of engineered substrate technologies, such as the 'Epi-twist' method, which involves depositing single crystal rare-earth compounds like Erbium or Ytterbium oxides epitaxially on silicon or germanium surfaces to create hybrid orientations, allowing nMOSFETs to be fabricated in a (100) plane and pMOSFETs in a (110) plane, thereby enhancing mobility and reducing leakage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional scaling methods are used to reduce gate length and gate oxide thickness, then device functionality and performance are enhanced, but off-state and on-state leakage currents increase and carrier mobility deteriorates
Solution Approach 1:
The patent applies local quality by creating different crystal orientations in different regions of the semiconductor device. Specifically, the substrate is engineered to have a first crystal orientation (e.g., <100>) in regions where nMOSFETs are formed and a second crystal orientation (e.g., <110>) in regions where pMOSFETs are formed. This allows each transistor type to benefit from the optimal crystal orientation for its specific carrier type, thereby improving carrier mobility while maintaining low leakage currents through the selective orientation design.
2Speed
If gate length and gate oxide thickness are scaled down, then device speed and functionality improve, but carrier mobility is adversely affected
Solution Approach 1:
The patent implements local quality by spatially varying the crystal orientation of the substrate to match the specific mobility requirements of different transistor types. nMOSFET regions utilize substrates with <100> orientation optimized for electron mobility, while pMOSFET regions use substrates with <110> orientation optimized for hole mobility. This regional optimization maintains high carrier mobility even as overall device dimensions are scaled down for improved speed.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively increases carrier mobility and reduces leakage currents, enabling continued device scaling with improved performance and power efficiency, as demonstrated by the enhancement of pMOSFET performance and the potential for simultaneous optimization of both nMOS and pMOS devices.
Implementation Method 1
depositing single crystal rare-earth compounds like Erbium or Ytterbium oxides epitaxially on silicon or germanium surfaces to create hybrid orientations
Data Source
AI summary
The present invention discloses structures to increase carrier mobility using engineered substrate technologies for a solid state device. Structures employing rare-earth compounds enable heteroepitaxy of different semiconductor materials of different orientations.