Multilayer Capacitor Margin Structure for Crack Path Redirection
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Solution Overview
Problem
Multilayer ceramic capacitors experience cracks due to expansion and contraction of the dielectric layer under applied voltage, particularly in large thick film products with high voltage, leading to potential damage to the capacitance formation portion.
Innovation Solution
A multilayer electronic component design with specific grain size and ion content distribution in margin portions, where G2>G1 and G2>G3, and C2>C1 and C2>C3 are satisfied, to enhance the strength of the margin portions and redirect crack paths away from the capacitance formation area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a perovskite material such as BaTiO3 is used in the dielectric layer to secure high dielectric constant, then high capacitance is achieved, but cracks occur in the dielectric layer or at the interface between dielectric and internal electrode due to expansion and contraction under applied voltage
Solution Approach 1:
The patent applies local quality by creating distinct grain size regions within the margin portions. Specifically, a first region adjacent to the capacitance formation portion has a first average grain size, a second region has a second average grain size larger than the first, and a third region adjacent to the external surface has a third average grain size. This gradient structure allows different regions to fulfill different functions: the capacitance formation portion maintains high dielectric constant for capacitance, while the margin portions with varying grain sizes provide progressive stress relief and crack path deflection, preventing crack propagation into the capacitance formation portion.
2Reliability
If large thick film products with high applied voltage are used to meet automotive requirements, then high capacitance and high reliability characteristics are achieved, but expansion and contraction of the dielectric layer cause cracks and interface fracture
Solution Approach 1:
The patent implements preliminary action by pre-configuring the margin portions with a specific grain size distribution before the component is subjected to high voltage stress. The gradient grain structure (with average grain sizes varying across first, second, and third regions) is established during manufacturing to proactively prevent crack initiation and propagation. This pre-engineered structure creates a stress distribution pattern that deflects potential cracks away from the capacitance formation portion before damage can occur, enabling the component to withstand high applied voltage without cracking.
3Strength
If the margin portions are designed with specific grain size distribution (G2>G1 and G2>G3) to redirect crack paths, then crack propagation is suppressed, but the manufacturing process becomes more complex
Solution Approach 1:
The patent applies parameter changes by systematically varying the grain size parameter across different regions of the margin portions. The first region has a first average grain size (G1), the second region has a second average grain size (G2) that is larger than G1, and the third region has a third average grain size (G3) that is smaller than G2. This controlled parameter variation creates a gradient structure that passively redirects crack paths through the margin portions and away from the capacitance formation portion, achieving enhanced crack resistance through material property gradients rather than complex structural designs or post-processing operations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design effectively suppresses crack occurrence and redirects crack paths, enhancing the reliability and durability of the multilayer electronic component, especially in high-voltage applications.
Implementation Method 1
When voltage is applied to the multilayer electronic component at room temperature, expansion is performed in a thickness direction of the multilayer electronic component, and relative contraction is performed in a width direction thereof by a perovskite crystal structure of a material included in the dielectric layer
Data Source
AI summary
A multilayer electronic component includes: a body including a dielectric layer and an internal electrode alternately disposed with the dielectric layer; and an external electrode disposed on the body, in which the body includes a capacitance formation portion and margin portions disposed on both surfaces of the capacitance formation portion in a width direction, the margin portions include a first region adjacent to the capacitance formation portion, a third region adjacent to an external surface of the margin portion, and a second region disposed between the first and third regions, and G2>G1 and G2>G3 when an average grain size of a dielectric grain included in the first region is referred to as G1, an average grain size of a dielectric grain included in the second region is referred to as G2, and an average grain size of a dielectric grain included in the third region is referred to as G3.


