Multilayer Capacitor Electroplating Dummy Electrode Seed
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Solution Overview
Problem
Existing multilayer capacitors face challenges in achieving narrow capacitance deviation due to thickness and printing alignment deviations in internal electrodes, leading to low yield and increased costs, especially in high-frequency applications, and suffer from short circuit issues during surface mounting technology due to difficulties in forming external electrodes as capacitors miniaturize.
Innovation Solution
The solution involves a multilayer capacitor design with simultaneously stacked dielectric layers and internal electrodes, using plating layers for both internal and external electrodes, and incorporating dummy electrodes as seed layers for precise electroplating, allowing for controlled area and thickness distribution and preventing short circuits during surface mounting.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If internal electrodes are formed using a printing method, then the manufacturing process is simple, but thickness deviation and printing alignment deviation occur leading to wide capacitance deviation
Solution Approach 1:
The patent replaces the printing method (mechanical deposition) with an electroplating method (electrochemical deposition) for forming internal electrodes. This substitution eliminates thickness deviation and alignment deviation associated with printing, achieving narrow capacitance deviation (B deviation ±0.1 pF) while maintaining manufacturing feasibility through the electroplating process
Solution Approach 2:
The patent changes the formation method parameter from printing to electroplating, which fundamentally alters how internal electrodes are deposited. This parameter change enables precise control of electrode thickness and alignment, directly resolving the capacitance deviation issue while keeping the manufacturing process practical
2Volume of moving object
If capacitor size is decreased for miniaturization, then mounting interval is reduced, but external electrode formation becomes difficult causing short circuit problems
Solution Approach 1:
The patent replaces the printing method for external electrode formation with an electroplating method. This substitution enables precise control of external electrode dimensions and positioning even in miniaturized capacitors, preventing short circuits during SMT while achieving the required small size for reduced mounting intervals
Solution Approach 2:
The electroplating process uses electrolyte solutions (hydraulic medium) to deposit external electrodes with high precision. This hydraulic-based electrochemical process enables accurate external electrode formation in miniaturized capacitors, preventing short circuits that occur with printing methods at small scales
3Ease of manufacture
If printing method is used for internal electrodes, then manufacturing is easier, but yield is less than 50% for B deviation specifications
Solution Approach 1:
The patent replaces printing with electroplating for internal electrode formation, achieving B deviation specifications with 93% yield compared to less than 50% with printing. This substitution dramatically improves productivity while maintaining ease of manufacture through the electroplating process
Solution Approach 2:
The electroplating process inherently provides self-alignment and uniform thickness deposition through electrochemical principles, eliminating the need for complex alignment procedures. This self-service characteristic enables high yield (93%) for B deviation products while keeping the manufacturing process straightforward
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables precise control of capacitance deviation within ±1.7%, significantly improving yield to 93% for B deviation specifications and preventing short circuits during surface mounting, while allowing for miniaturization and high integration of components.
Implementation Method 1
The first and second internal electrodes may be plating layers
Implementation Method 2
The first and second external electrodes may be include plating layers
Data Source
AI summary
A multilayer capacitor includes a body including dielectric layers and first and second internal electrodes alternately disposed with dielectric layers interposed therebetween. First and second external electrodes are on the body and connected to the first and second internal electrodes, respectively. The first and second internal electrodes are plating layers. A manufacturing method of a multilayer capacitor includes preparing a plurality of laminated sheets including internal electrodes, dummy electrodes, and dielectric layers. The plurality of laminated sheets, and covers on and below the laminated sheets, are simultaneously stacked and then cured to prepare a cured product. The cured product is then diced depending on the size of the capacitor to prepare a body where the internal electrodes and the dummy electrodes are partially exposed. External electrodes are formed on external surfaces of the body using the dummy electrodes as seeds in a plating method.