Multilayer Capacitor ESL Control Pattern for Noise Suppression

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Solution Overview

Problem

In the context of increasing microprocessor unit (MPU) operating frequencies and decreasing voltage use, existing multilayer capacitors face challenges in efficiently suppressing noise voltage due to high equivalent series resistance (ESR) and increased impedance from anti-resonance, especially in miniaturized mounting spaces with limited space for multiple capacitors.

Innovation Solution

A multilayer capacitor design featuring dielectric layers stacked perpendicular to the mounting surface with internal electrodes and equivalent series inductance (ESL) control patterns, where the ESL control patterns are exposed to the mounting surface, having a larger area than the internal electrodes, to achieve low ESL characteristics and maintain capacitance, thereby controlling noise voltage effectively.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-affected harmful factors

If multiple capacitors with different capacitances and ESL values are used to suppress noise voltage, then voltage noise suppression is improved, but equivalent series resistance is excessively decreased causing impedance increase due to anti-resonance

Engineering Contradiction:
Improvevoltage noiseVSAvoidimpedance
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The patent combines multiple capacitor functions (different capacitances and ESL values) into a single multilayer capacitor by forming internal electrodes and ESL control patterns on dielectric layers. This merging approach achieves the noise suppression benefits of multiple capacitors while avoiding the impedance increase caused by anti-resonance between separate capacitors.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The capacitor structure is segmented into distinct functional regions: internal electrodes providing capacitance and ESL control patterns providing inductance control. This segmentation allows independent optimization of capacitance and ESL characteristics within a single component, resolving the contradiction between noise suppression and impedance control.

Inventive Principle:
Principle #1Segmentation

2Object-affected harmful factors

If multiple capacitors are used to achieve low ESL characteristics, then voltage noise suppression is improved, but mounting space is increased due to miniaturization constraints

Engineering Contradiction:
Improvevoltage noiseVSAvoidmounting space
Core Design Contradiction:
Object-affected harmful factorsVSArea of stationary object

Solution Approach 1:

The patent merges multiple capacitor functions into a single component, reducing the number of discrete components from multiple capacitors to one integrated multilayer capacitor. This significantly reduces mounting space while maintaining the low ESL characteristics needed for effective noise suppression.

Inventive Principle:
Principle #5Merging (Combining)

3Object-affected harmful factors

If multiple capacitors are used to achieve low ESL characteristics, then voltage noise suppression is improved, but device complexity is increased due to increased number of external electrodes

Engineering Contradiction:
Improvevoltage noiseVSAvoidnumber of external electrodes
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The patent combines multiple capacitor functions into a single component with a unified electrode structure. Instead of requiring multiple separate capacitors each with their own external electrodes, the invention uses internal electrodes and ESL control patterns that integrate multiple functions, thereby reducing the number of external electrodes and simplifying the overall device complexity.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS10104777B2Multilayer capacitor and board having the same
Publication Date: 2018.10.16 SAMSUNG ELECTRO MECHANICS CO LTD
  • US10104777B2 patent drawing
  • US10104777B2 patent drawing
  • US10104777B2 patent drawing

AI summary

A multilayer capacitor include dielectric layers stacked in a direction perpendicular to a mounting surface of a capacitor body, and internal electrodes and an equivalent series inductance (ESL) control pattern formed on upper and lower portions of the dielectric layers, respectively. The internal electrodes have an area larger than that of the ESL control pattern, and the ESL control pattern is exposed to a mounting surface of a capacitor body.