Multi-Layer Chip Fabrication Using Segmented Oxide Bonding
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Solution Overview
Problem
Existing three-dimensional integration (3D-IC) technologies are insufficient for integrating more than two chips, failing to meet the increasing demands for higher device performance and integration degrees.
Innovation Solution
A multi-layer chip fabrication method involving bonding and metal interconnection of three chips using metal and oxide layers, with specific thicknesses and masking layers, to achieve higher integration levels and performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If existing 3D-IC technology is used to integrate two chips, then integration degree and device performance are improved, but the integration degree is insufficient to meet higher requirements for three or more chips
Solution Approach 1:
The patent divides the multi-chip integration process into distinct segments: first performing mixed bonding for two chips, then separately performing oxidizing bonding for the third chip. This segmentation allows each bonding process to be optimized independently, enabling integration of three or more chips without excessive complexity
Solution Approach 2:
The patent introduces oxide layers as intermediary bonding interfaces between chips. The oxide layers facilitate the oxidizing bonding process and enable reliable electrical connections between multiple chip layers, acting as mediators that simplify the overall integration process
2Reliability
If more chips are integrated to increase performance, then device performance and integration degree are enhanced, but the manufacturing process complexity increases
Solution Approach 1:
The fabrication process is segmented into distinct stages: first chip bonding, then oxide layer formation, followed by additional chip bonding. This segmentation makes the manufacturing of multi-chip structures more manageable and scalable
Solution Approach 2:
The patent performs preliminary mixed bonding of two chips before adding the third chip through oxidizing bonding. This preliminary action establishes a stable foundation that simplifies subsequent manufacturing steps
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method enables the integration of three or more layers of chips, enhancing device performance and integration degree while maintaining a compact size, suitable for various performance requirements with good electrical performance.
Implementation Method 1
performing oxidizing bonding of the third-layer chip on a basis of mixed bonding of two layers of chips
Implementation Method 2
the third metal layer being interconnected with the second metal layer
Data Source
AI summary
A multi-layer chip and a fabrication method thereof are disclosed. The method includes: bonding a first chip having a first metal layer to a second chip having a second metal layer; forming a first metal contact in the second chip, the first metal contact connecting to the second metal layer; depositing oxide on the second chip to form a first oxide layer; bonding the first oxide layer and a second oxide layer of a third chip; and forming a second metal contact penetrating through the first oxide layer and the second oxide layer for connecting the first metal contact with a third metal layer in the third chip via the second metal contact.