Multilayer Coil Substrate Layout to Prevent Wiring Short Circuits
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Solution Overview
Problem
Multilayer substrates with plated conductor layers are prone to short circuits due to the close spacing of overlapping wirings, which can lead to electrical failures in devices such as cell phones and other electronic devices.
Innovation Solution
The design incorporates a multilayer substrate structure with conductor layers having connection portions and circuit portions, where the connection portions have a maximum thickness greater than the overlapping portions, and the plated layer thickness in the connection portions exceeds the plated layer thickness in the overlapping portions, reducing the likelihood of short circuits by maintaining a sufficient gap between the layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If connection portions have larger plating thickness, then electrical conductivity at connection points is improved, but manufacturing complexity increases
Solution Approach 1:
The patent incorporates thickness variation into the initial plating process by designing masks or stencils that define different plating thicknesses for different portions before plating occurs. This preliminary preparation allows the complex thickness pattern to be achieved in a single plating operation rather than requiring multiple sequential plating steps, thereby reducing manufacturing complexity while still achieving the desired conductivity differentiation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively reduces the risk of short circuits between conductor layers, enhancing the reliability of connections and preventing electrical failures in multilayer substrates used in electronic devices.
Implementation Method 1
a first conductor layer disposed on a first principal surface of the first insulating layer and including a plated layer
Data Source
AI summary
A multilayer substrate includes an element assembly including a second insulating layer and a first insulating layer arranged in this order from a first side to a second side with respect to a layer stacking direction, a first conductor layer on the first side of the first insulating layer and including a plated layer, and a second conductor layer on the first side of the second insulating layer. The first conductor layer includes a first connection portion and a first circuit portion, and the second conductor layer includes a second connection portion and a second circuit portion. When viewed from the layer stacking direction, the first circuit portion includes an overlapping portion which overlaps the second circuit portion. A portion of the first connection portion connected to the second connection portion has a maximum thickness greater than a maximum thickness of the overlapping portion.


