Multilayer Composite Bonding for Thermal Stress Compensation
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Solution Overview
Problem
Traditional bonding techniques for semiconductor devices to metal substrates in power electronics fail to adequately compensate for thermal cooling stresses caused by coefficient of thermal expansion mismatch, leading to delamination issues at high operating temperatures.
Innovation Solution
A multilayer composite bonding material with thermal stress compensation layers, featuring a core layer with a specific stiffness sandwiched between outer layers of different stiffness, where the core layer has a melting point above the sintering temperature and the bonding layers have a melting point below, providing a graded stiffness to mitigate thermal contraction mismatch.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional bonding layers are used for TLP bonding, then bonding between semiconductor device and metal substrate is achieved, but thermal cooling stresses cause delamination due to CTE mismatch
Solution Approach 1:
The patent uses a multilayer composite bonding structure consisting of an inner bonding layer (melting point below sintering temperature) and an outer bonding layer (melting point above sintering temperature). This composite structure allows the inner layer to form TLP bonds while the outer layer provides thermal stress compensation due to its higher melting point and different thermal properties, thereby reducing delamination caused by CTE mismatch.
Solution Approach 2:
The patent changes the melting point parameter of the bonding layers by using two different materials with distinct melting points. The inner layer uses a material with melting point below the sintering temperature (e.g., 280-350°C) to enable TLP bonding, while the outer layer uses a material with melting point above the sintering temperature to provide thermal stress compensation during cooling.
2Ease of manufacture
If bonding layers with uniform stiffness are used, then manufacturing is simplified, but thermal stress compensation is insufficient leading to delamination
Solution Approach 1:
The patent applies local quality by giving different stiffness characteristics to different regions of the bonding structure. The outer bonding layer has different stiffness properties compared to the inner bonding layer, allowing each layer to perform its specific function: the inner layer for bonding and the outer layer for stress compensation. This localized differentiation improves thermal stress resistance while maintaining manufacturing feasibility through sequential deposition or lamination processes.
3Power
If operating temperature is increased to meet high-power applications, then power handling capability is improved, but thermal stresses increase causing delamination
Solution Approach 1:
The multilayer composite bonding structure enables high-power applications by providing thermal stress compensation. The outer layer with higher melting point maintains structural integrity at elevated operating temperatures (above 280-350°C) while compensating for thermal expansion differences, allowing the device to handle higher power levels without delamination.
Solution Approach 2:
The patent changes the thermal parameter profile of the bonding structure by introducing a bimetallic-like configuration where the outer layer's higher melting point creates a gradient in thermal expansion characteristics. This parameter variation allows the bonding structure to withstand higher operating temperatures and the associated thermal stresses that would otherwise cause delamination in single-layer configurations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The multilayer composite bonding material effectively compensates for thermally-induced stresses, preventing delamination and ensuring secure bonding of semiconductor devices to metal substrates even at high temperatures, thus enhancing the reliability and durability of power electronics assemblies.
Implementation Method 1
The bonding layer at least partially melts and isothermally solidifies to form a TLP bond between the semiconductor device and metal substrate at TLP bonding temperatures
Implementation Method 2
The TLP sintering of a power electronics device utilizes a bonding layer sandwiched between a semiconductor device and metal substrate. The bonding layer at least partially melts and isothermally solidifies to form a TLP bond
Implementation Method 3
The semiconductor devices and metal substrates have different coefficients of thermal expansion (CTE) and large thermally-induced stresses (e.g., cooling stresses) may be generated between a semiconductor device and metal substrate upon cooling from a TLP sintering temperature
Implementation Method 4
The thermal stress compensation layers may include a core layer with a first stiffness sandwiched between a pair of outer layers with a second stiffness that is different than the first stiffness such that a graded stiffness extends across a thickness of the thermal stress compensation layers
Data Source
AI summary
A multilayer composite bonding material for transient liquid phase bonding a semiconductor device to a metal substrate includes thermal stress compensation layers sandwiched between a pair of bonding layers. The thermal stress compensation layers may include a core layer with a first stiffness sandwiched between a pair of outer layers with a second stiffness that is different than the first stiffness such that a graded stiffness extends across a thickness of the thermal stress compensation layers. The thermal stress compensation layers have a melting point above a sintering temperature and the bonding layers have a melting point below the sintering temperature. The graded stiffness across the thickness of the thermal stress compensation layers compensates for thermal contraction mismatch between the semiconductor device and the metal substrate during cooling from the sintering temperature to ambient temperature.