Multilayer Field Plate Layout for High-Breakdown Semiconductor Devices

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Solution Overview

Problem

Existing power semiconductor devices face challenges in achieving high breakdown voltage, high electron mobility, and thermal stability, which are crucial for applications in wireless communications and electric vehicles.

Innovation Solution

A semiconductor device structure is formed with a channel layer, barrier layer, gate structure, and dielectric layers, along with a field plate and electrodes, where the field plate is formed from the same ohmic contact metal layer, allowing for precise control of charge ratios and increased breakdown voltage through multilayer design.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a conventional semiconductor device structure is used, then the fabrication process is simpler, but the breakdown voltage is lower

Engineering Contradiction:
Improvebreakdown voltageVSAvoiddevice structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The device is segmented into distinct functional layers including channel layer, barrier layer, first dielectric layer, second dielectric layer, and field plate structure. This segmentation allows each layer to be optimized for its specific function, with the field plate and multilayer dielectric structure working together to enhance breakdown voltage while maintaining manageable fabrication complexity

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a vertical multilayer dielectric structure with the second dielectric layer positioned between the gate structure and drain electrode. This vertical dimensionality addition creates additional electrical isolation and field control pathways, significantly improving breakdown voltage without expanding the lateral footprint of the device

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Manufacturing precision

If multiple masks are used for precise electrode formation, then the electrode positioning is more accurate, but the fabrication complexity increases

Engineering Contradiction:
Improveelectrode positioning accuracyVSAvoidfabrication process complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The source electrode, drain electrode, and field plate are merged into a single ohmic contact metal layer that is formed in one deposition step. This merging allows all three electrodes to be positioned accurately relative to each other through a single patterning process, eliminating the need for multiple separate mask steps while maintaining high positioning accuracy

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The single ohmic contact metal layer serves multiple functions simultaneously as the source electrode, drain electrode, and field plate. This multi-functionality reduces the number of fabrication steps required while ensuring consistent positioning and electrical characteristics across all electrodes, as they are all formed from the same material layer with uniform properties

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS20250301681A1Semiconductor device and method of forming the same
Publication Date: 2025.09.25 HON HAI PRECISION INDUSTRY CO LTD
  • US20250301681A1 patent drawing
  • US20250301681A1 patent drawing
  • US20250301681A1 patent drawing

AI summary

A method of forming a semiconductor device includes forming a channel layer and a barrier layer on a substrate; forming a gate structure on the barrier layer, conformally forming a first dielectric layer on the barrier layer and the gate structure; forming a second dielectric layer spaced apart from the gate structure on the first dielectric layer; forming an ohmic contact metal layer on the first dielectric layer and the second dielectric layer, in which the ohmic contact metal layer contacts the barrier layer through a first opening and a second opening of the first dielectric layer; and etching the ohmic contact metal layer. A source electrode filled in the first opening, a drain electrode filled in the second opening, and a field plate disposed between the source electrode and the drain electrode and partially covering the second dielectric layer are formed. A semiconductor device is also disclosed.