Multilayer Electrical Node Embedding for Thermal Stress Management
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Solution Overview
Problem
Existing electronic assembly methods face challenges in integrating dense and complex components into multilayer structures due to reliability risks, assembly yield issues, and thermal management problems, particularly with mismatched thermal expansion coefficients and complex geometries, leading to potential overheating and structural stress.
Innovation Solution
A multilayer structure and manufacturing method involving a substrate film with cavities filled by a material layer to embed electrical elements, incorporating thermal management elements and elastic materials for improved integration and reduced complexity, with a molded or cast material layer covering the electrical nodes to enhance reliability and efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If complex electrical circuits are produced on a substrate by printing and/or utilizing SMDs and then overmolded by plastic material, then the desired functionality is achieved, but reliability risks and assembly yield issues arise due to challenges in integrating dense components and components with complex geometries
Solution Approach 1:
The patent divides the substrate into multiple layers with electrical circuits distributed across different levels. This segmentation allows complex functionalities to be achieved while reducing the density of components on any single layer, thereby improving assembly yield and reliability during the overmolding process.
Solution Approach 2:
The patent transitions from two-dimensional circuit layouts to three-dimensional multilayer structures. By stacking multiple substrate layers and routing circuits through vertical vias, the design achieves complex functionality without increasing planar component density, thus avoiding the reliability issues associated with dense single-layer configurations.
2Adaptability or versatility
If dense components and components of complex geometry are directly integrated, then the degree of integration is improved, but reliability is affected by molding pressure and assembly yields in different production phases become very low
Solution Approach 1:
The patent segments the integrated circuit system into multiple substrate layers, each containing a subset of the total components. This segmentation maintains high overall integration while reducing the local component density and geometric complexity on each layer, making the assembly process more reliable and less susceptible to molding pressure defects.
Solution Approach 2:
The patent implements a nested structure where multiple substrate layers are stacked and interconnected through vias. This nested arrangement achieves high integration by embedding multiple circuit levels within a compact volume, while each individual layer remains simple enough to maintain high assembly yields during manufacturing.
3Strength
If subassemblies are mounted or arranged on a PCB and covered with a plastic layer, then the structure is protected, but mismatch in thermal expansion coefficients causes stresses that can tear the subassemblies off their electrical contacts
Solution Approach 1:
The patent changes the material parameters of the substrate and encapsulant to achieve better thermal expansion matching. By selecting materials with compatible coefficients of thermal expansion, the design reduces thermally-induced stresses that would otherwise tear electrical contacts from subassemblies during temperature cycling.
Solution Approach 2:
The patent employs composite material structures combining the PCB substrate, mounting subassemblies, and encapsulant plastic. This composite approach allows optimization of thermal expansion properties across the entire assembly, reducing differential stress and maintaining electrical contact integrity under thermal loading.
4Adaptability or versatility
If complex electrical circuits are produced to achieve desired functionalities, then the functionality is improved, but the complexity of the structure increases making it difficult to be overmolded
Solution Approach 1:
The patent segments the circuit implementation across multiple substrate layers, which simplifies the geometry of each individual layer and makes the overall structure more amenable to overmolding. The segmented approach maintains full functionality while reducing manufacturing complexity compared to attempting to integrate all circuits on a single complex layer.
Data Source
Figure 1~3
Figure 4A~4D
Figure 5A~5B
AI summary
An electrical node (100), a method, an electrical assembly such as a node strip or sheet, a related multilayer structure and a method of manufacture are presented. The electrical node comprises a first substrate film (10) defining a cavity, and a first material layer (30) arranged to at l east partly fill the cavity, and to embed or at l east partly cover at l east one electrical element (12) arranged into the cavity.