Multilayer Oxide Semiconductor Transistor Structure
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Solution Overview
Problem
Current semiconductor devices, particularly transistors, face challenges in achieving high on-state current, low off-state current, stable electrical characteristics, high field-effect mobility, and high yield due to limitations in oxide semiconductor layer configurations and impurity effects.
Innovation Solution
A semiconductor device with a multilayer film structure comprising a first, second, and third oxide semiconductor layer, each containing indium and zinc, with specific atomic ratios and thicknesses, is used to enhance electrical characteristics. The layers are arranged to optimize the energy at the bottom of the conduction band and reduce density of states (DOS) at interfaces, improving channel formation and transistor performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a single oxide semiconductor layer is used in the transistor, then the device structure is simple and manufacturing is easier, but the on-state current is insufficient and field-effect mobility is limited
Solution Approach 1:
The oxide semiconductor layer is divided into multiple sub-layers (first oxide semiconductor layer, second oxide semiconductor layer, and third oxide semiconductor layer) with different compositions and functions. The first layer provides high carrier concentration for low off-state current, the second layer provides high mobility for high on-state current, and the third layer provides interface quality. This segmentation resolves the contradiction by achieving high performance through layered structure while maintaining manufacturing feasibility through sequential deposition processes.
Solution Approach 2:
The patent uses composite oxide semiconductor materials with different atomic ratios of In, Ga, and Zn in each layer. The first layer has a specific atomic ratio optimized for low off-state current, the second layer has a different ratio optimized for high mobility, and the third layer has yet another ratio optimized for interface quality. This composite material approach enables simultaneous achievement of high on-state current and low off-state current that cannot be obtained with a single uniform material.
2Reliability
If high-temperature heat treatment or laser light treatment is applied to form polycrystalline silicon film, then field-effect mobility is improved, but manufacturing complexity and process difficulty increase
Solution Approach 1:
The patent changes the compositional parameters of the oxide semiconductor layers to achieve high field-effect mobility without requiring high-temperature heat treatment or laser light treatment. By optimizing the atomic ratios of In, Ga, and Zn in each layer and controlling the deposition conditions, the patent achieves polycrystalline or microcrystalline structure formation during deposition at lower temperatures, thus resolving the contradiction between high mobility and process simplicity.
3Reliability
If oxide semiconductor layers with different compositions are stacked, then electrical characteristics are improved, but manufacturing precision requirements increase
Solution Approach 1:
The patent defines specific atomic ratio ranges for In, Ga, and Zn in each oxide semiconductor layer to achieve the desired electrical characteristics while accounting for manufacturing variations. The first layer has atomic ratios optimized for low off-state current, the second layer has ratios optimized for high mobility, and the third layer has ratios optimized for interface quality. These parameter specifications enable manufacturing with controlled precision while achieving high performance.
Data Source
AI summary
A transistor or the like having excellent electrical characteristics is provided. A semiconductor device includes a gate electrode; a gate insulating film in contact with the gate electrode; and a multilayer film which is in contact with the gate insulating film and includes a first oxide semiconductor layer, a second oxide semiconductor layer, and a third oxide semiconductor layer in the order from a side farthest from the gate insulating film. The first oxide semiconductor layer, the second oxide semiconductor layer, and the third oxide semiconductor layer each contain indium, an element M (aluminum, gallium, yttrium, or tin), and zinc. The first oxide semiconductor layer has a thickness greater than or equal to 20 nm and less than or equal to 200 nm. The third oxide semiconductor layer has a thickness greater than or equal to 0.3 nm and less than 10 nm.